radeonsi: rename desc_list_byte_size -> vb_desc_list_alloc_size
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
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1e03b63b3b
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@ -433,12 +433,12 @@ static void cik_prefetch_shader_async(struct si_context *sctx,
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static void cik_prefetch_VBO_descriptors(struct si_context *sctx)
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static void cik_prefetch_VBO_descriptors(struct si_context *sctx)
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{
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{
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if (!sctx->vertex_elements || !sctx->vertex_elements->desc_list_byte_size)
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if (!sctx->vertex_elements || !sctx->vertex_elements->vb_desc_list_alloc_size)
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return;
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return;
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cik_prefetch_TC_L2_async(sctx, &sctx->vb_descriptors_buffer->b.b,
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cik_prefetch_TC_L2_async(sctx, &sctx->vb_descriptors_buffer->b.b,
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sctx->vb_descriptors_offset,
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sctx->vb_descriptors_offset,
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sctx->vertex_elements->desc_list_byte_size);
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sctx->vertex_elements->vb_desc_list_alloc_size);
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}
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}
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/**
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/**
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@ -868,7 +868,7 @@ static void si_dump_descriptors(struct si_context *sctx,
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desc.list = sctx->vb_descriptors_gpu_list;
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desc.list = sctx->vb_descriptors_gpu_list;
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desc.gpu_list = sctx->vb_descriptors_gpu_list;
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desc.gpu_list = sctx->vb_descriptors_gpu_list;
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desc.element_dw_size = 4;
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desc.element_dw_size = 4;
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desc.num_active_slots = sctx->vertex_elements->desc_list_byte_size / 16;
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desc.num_active_slots = sctx->vertex_elements->vb_desc_list_alloc_size / 16;
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si_dump_descriptor_list(sctx->screen, &desc, name,
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si_dump_descriptor_list(sctx->screen, &desc, name,
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" - Vertex buffer", 4, info->num_inputs,
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" - Vertex buffer", 4, info->num_inputs,
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@ -1097,8 +1097,6 @@ bool si_upload_vertex_buffer_descriptors(struct si_context *sctx)
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{
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{
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struct si_vertex_elements *velems = sctx->vertex_elements;
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struct si_vertex_elements *velems = sctx->vertex_elements;
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unsigned i, count;
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unsigned i, count;
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unsigned desc_list_byte_size;
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unsigned first_vb_use_mask;
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uint32_t *ptr;
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uint32_t *ptr;
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if (!sctx->vertex_buffers_dirty || !velems)
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if (!sctx->vertex_buffers_dirty || !velems)
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@ -1109,16 +1107,16 @@ bool si_upload_vertex_buffer_descriptors(struct si_context *sctx)
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if (!count)
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if (!count)
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return true;
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return true;
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desc_list_byte_size = velems->desc_list_byte_size;
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unsigned alloc_size = velems->vb_desc_list_alloc_size;
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first_vb_use_mask = velems->first_vb_use_mask;
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unsigned first_vb_use_mask = velems->first_vb_use_mask;
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/* Vertex buffer descriptors are the only ones which are uploaded
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/* Vertex buffer descriptors are the only ones which are uploaded
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* directly through a staging buffer and don't go through
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* directly through a staging buffer and don't go through
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* the fine-grained upload path.
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* the fine-grained upload path.
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*/
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*/
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u_upload_alloc(sctx->b.const_uploader, 0,
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u_upload_alloc(sctx->b.const_uploader, 0,
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desc_list_byte_size,
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alloc_size,
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si_optimal_tcc_alignment(sctx, desc_list_byte_size),
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si_optimal_tcc_alignment(sctx, alloc_size),
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&sctx->vb_descriptors_offset,
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&sctx->vb_descriptors_offset,
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(struct pipe_resource**)&sctx->vb_descriptors_buffer,
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(struct pipe_resource**)&sctx->vb_descriptors_buffer,
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(void**)&ptr);
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(void**)&ptr);
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@ -4873,7 +4873,7 @@ static void *si_create_vertex_elements(struct pipe_context *ctx,
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return NULL;
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return NULL;
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v->count = count;
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v->count = count;
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v->desc_list_byte_size = align(count * 16, SI_CPDMA_ALIGNMENT);
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v->vb_desc_list_alloc_size = align(count * 16, SI_CPDMA_ALIGNMENT);
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for (i = 0; i < count; ++i) {
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for (i = 0; i < count; ++i) {
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const struct util_format_description *desc;
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const struct util_format_description *desc;
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@ -173,7 +173,7 @@ struct si_vertex_elements
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uint16_t first_vb_use_mask;
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uint16_t first_vb_use_mask;
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/* Vertex buffer descriptor list size aligned for optimal prefetch. */
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/* Vertex buffer descriptor list size aligned for optimal prefetch. */
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uint16_t desc_list_byte_size;
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uint16_t vb_desc_list_alloc_size;
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uint16_t instance_divisor_is_one; /* bitmask of inputs */
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uint16_t instance_divisor_is_one; /* bitmask of inputs */
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uint16_t instance_divisor_is_fetched; /* bitmask of inputs */
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uint16_t instance_divisor_is_fetched; /* bitmask of inputs */
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};
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};
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