From 1db36422b974094fc7ced81b734143b4f4aec302 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Thu, 5 Aug 2021 17:47:02 +0200 Subject: [PATCH] radv: fix initializing the DS clear metadata value for separate aspects We shouldn't overwrite the clear value of the other aspect (in case separate depth/stencil layouts are used). Found by inspection. Cc: 21.2 mesa-stable Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen Part-of: --- src/amd/vulkan/radv_cmd_buffer.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 1fda5e270f8..feb78d628c3 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -6609,7 +6609,6 @@ static void radv_initialize_htile(struct radv_cmd_buffer *cmd_buffer, struct radv_image *image, const VkImageSubresourceRange *range) { - VkImageAspectFlags aspects = VK_IMAGE_ASPECT_DEPTH_BIT; struct radv_cmd_state *state = &cmd_buffer->state; uint32_t htile_value = radv_get_htile_initial_value(cmd_buffer->device, image); VkClearDepthStencilValue value = {0}; @@ -6625,10 +6624,7 @@ radv_initialize_htile(struct radv_cmd_buffer *cmd_buffer, struct radv_image *ima state->flush_bits |= radv_clear_htile(cmd_buffer, image, range, htile_value); - if (vk_format_has_stencil(image->vk_format)) - aspects |= VK_IMAGE_ASPECT_STENCIL_BIT; - - radv_set_ds_clear_metadata(cmd_buffer, image, range, value, aspects); + radv_set_ds_clear_metadata(cmd_buffer, image, range, value, range->aspectMask); if (radv_image_is_tc_compat_htile(image) && (range->aspectMask & VK_IMAGE_ASPECT_DEPTH_BIT)) { /* Initialize the TC-compat metada value to 0 because by