i965g: add DEBUG_MIN_URB flag
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5d7c0cf563
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1d6b5957c6
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@ -15,7 +15,7 @@
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#define DEBUG_BATCH 0x80
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#define DEBUG_PIXEL 0x100
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#define DEBUG_BUFMGR 0x200
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#define DEBUG_unused1 0x400
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#define DEBUG_MIN_URB 0x400
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#define DEBUG_unused2 0x800
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#define DEBUG_unused3 0x1000
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#define DEBUG_SYNC 0x2000
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@ -48,6 +48,7 @@ static const struct debug_named_value debug_names[] = {
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{ "bat", DEBUG_BATCH},
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{ "pix", DEBUG_PIXEL},
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{ "buf", DEBUG_BUFMGR},
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{ "min", DEBUG_MIN_URB},
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{ "sync", DEBUG_SYNC},
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{ "prim", DEBUG_PRIMS },
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{ "vert", DEBUG_VERTS },
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@ -291,7 +292,7 @@ brw_create_screen(struct brw_winsys_screen *sws, uint pci_id)
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#ifdef DEBUG
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BRW_DEBUG = debug_get_flags_option("BRW_DEBUG", debug_names, 0);
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BRW_DEBUG |= debug_get_flags_option("INTEL_DEBUG", debug_names, 0);
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BRW_DEBUG |= DEBUG_STATS;
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BRW_DEBUG |= DEBUG_STATS | DEBUG_MIN_URB;
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#endif
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memset(&chipset, 0, sizeof chipset);
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@ -84,7 +84,7 @@
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* XXX: Verify min_nr_entries, esp for VS.
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* XXX: Verify SF min_entry_size.
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*/
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static const struct {
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static const struct urb_limits {
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GLuint min_nr_entries;
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GLuint preferred_nr_entries;
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GLuint min_entry_size;
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@ -167,6 +167,15 @@ static int recalculate_urb_fence( struct brw_context *brw )
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}
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}
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if (BRW_DEBUG & DEBUG_MIN_URB) {
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brw->urb.nr_vs_entries = limits[VS].min_nr_entries;
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brw->urb.nr_gs_entries = limits[GS].min_nr_entries;
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brw->urb.nr_clip_entries = limits[CLP].min_nr_entries;
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brw->urb.nr_sf_entries = limits[SF].min_nr_entries;
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brw->urb.nr_cs_entries = limits[CS].min_nr_entries;
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brw->urb.constrained = 1;
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}
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if (!check_urb_layout(brw)) {
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brw->urb.nr_vs_entries = limits[VS].min_nr_entries;
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brw->urb.nr_gs_entries = limits[GS].min_nr_entries;
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