iris: Make mocs an inline helper in iris_resource.h
Now that it uses ISL rather than genxml code, there's no need for it to
live as a vtable function inside the state module. We can just make it
a static inline helper in iris_resource.h so it's available throughout
the codebase.
Fixes: a4da6008b6
("iris: Use mocs from isl_dev.")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3720>
This commit is contained in:
parent
f8ab00776c
commit
1cdf5abdfa
|
@ -251,7 +251,7 @@ iris_blorp_surf_for_resource(struct iris_vtable *vtbl,
|
|||
.buffer = res->bo,
|
||||
.offset = res->offset,
|
||||
.reloc_flags = is_render_target ? EXEC_OBJECT_WRITE : 0,
|
||||
.mocs = vtbl->mocs(res->bo, isl_dev),
|
||||
.mocs = iris_mocs(res->bo, isl_dev),
|
||||
},
|
||||
.aux_usage = aux_usage,
|
||||
};
|
||||
|
@ -262,7 +262,7 @@ iris_blorp_surf_for_resource(struct iris_vtable *vtbl,
|
|||
.buffer = res->aux.bo,
|
||||
.offset = res->aux.offset,
|
||||
.reloc_flags = is_render_target ? EXEC_OBJECT_WRITE : 0,
|
||||
.mocs = vtbl->mocs(res->bo, isl_dev),
|
||||
.mocs = iris_mocs(res->bo, isl_dev),
|
||||
};
|
||||
surf->clear_color =
|
||||
iris_resource_get_clear_color(res, NULL, NULL);
|
||||
|
@ -270,7 +270,7 @@ iris_blorp_surf_for_resource(struct iris_vtable *vtbl,
|
|||
.buffer = res->aux.clear_color_bo,
|
||||
.offset = res->aux.clear_color_offset,
|
||||
.reloc_flags = 0,
|
||||
.mocs = vtbl->mocs(res->aux.clear_color_bo, isl_dev),
|
||||
.mocs = iris_mocs(res->aux.clear_color_bo, isl_dev),
|
||||
};
|
||||
}
|
||||
}
|
||||
|
|
|
@ -571,7 +571,6 @@ struct iris_vtable {
|
|||
struct iris_fs_prog_key *key);
|
||||
void (*populate_cs_key)(const struct iris_context *ice,
|
||||
struct iris_cs_prog_key *key);
|
||||
uint32_t (*mocs)(const struct iris_bo *bo, const struct isl_device *isl_dev);
|
||||
void (*lost_genx_state)(struct iris_context *ice, struct iris_batch *batch);
|
||||
};
|
||||
|
||||
|
|
|
@ -326,7 +326,7 @@ iris_update_grid_size_resource(struct iris_context *ice,
|
|||
.size_B = sizeof(grid->grid),
|
||||
.format = ISL_FORMAT_RAW,
|
||||
.stride_B = 1,
|
||||
.mocs = ice->vtbl.mocs(grid_bo, isl_dev));
|
||||
.mocs = iris_mocs(grid_bo, isl_dev));
|
||||
|
||||
ice->state.dirty |= IRIS_DIRTY_BINDINGS_CS;
|
||||
}
|
||||
|
|
|
@ -177,7 +177,7 @@ iris_upload_ubo_ssbo_surf_state(struct iris_context *ice,
|
|||
: ISL_FORMAT_R32G32B32A32_FLOAT,
|
||||
.swizzle = ISL_SWIZZLE_IDENTITY,
|
||||
.stride_B = 1,
|
||||
.mocs = ice->vtbl.mocs(res->bo, &screen->isl_dev));
|
||||
.mocs = iris_mocs(res->bo, &screen->isl_dev));
|
||||
}
|
||||
|
||||
static nir_ssa_def *
|
||||
|
|
|
@ -27,6 +27,7 @@
|
|||
#include "util/u_inlines.h"
|
||||
#include "util/u_range.h"
|
||||
#include "intel/isl/isl.h"
|
||||
#include "iris_bufmgr.h"
|
||||
|
||||
struct iris_batch;
|
||||
struct iris_context;
|
||||
|
@ -289,6 +290,12 @@ iris_resource_bo(struct pipe_resource *p_res)
|
|||
return res->bo;
|
||||
}
|
||||
|
||||
static inline uint32_t
|
||||
iris_mocs(const struct iris_bo *bo, const struct isl_device *dev)
|
||||
{
|
||||
return bo && bo->external ? dev->mocs.external : dev->mocs.internal;
|
||||
}
|
||||
|
||||
struct iris_format_info iris_format_for_usage(const struct gen_device_info *,
|
||||
enum pipe_format pf,
|
||||
isl_surf_usage_flags_t usage);
|
||||
|
|
|
@ -110,12 +110,6 @@
|
|||
#include "iris_genx_macros.h"
|
||||
#include "intel/common/gen_guardband.h"
|
||||
|
||||
static uint32_t
|
||||
mocs(const struct iris_bo *bo, const struct isl_device *dev)
|
||||
{
|
||||
return bo && bo->external ? dev->mocs.external : dev->mocs.internal;
|
||||
}
|
||||
|
||||
/**
|
||||
* Statically assert that PIPE_* enums match the hardware packets.
|
||||
* (As long as they match, we don't need to translate them.)
|
||||
|
@ -2116,7 +2110,7 @@ fill_buffer_surface_state(struct isl_device *isl_dev,
|
|||
.format = format,
|
||||
.swizzle = swizzle,
|
||||
.stride_B = cpp,
|
||||
.mocs = mocs(res->bo, isl_dev));
|
||||
.mocs = iris_mocs(res->bo, isl_dev));
|
||||
}
|
||||
|
||||
#define SURFACE_STATE_ALIGNMENT 64
|
||||
|
@ -2275,7 +2269,7 @@ fill_surface_state(struct isl_device *isl_dev,
|
|||
struct isl_surf_fill_state_info f = {
|
||||
.surf = surf,
|
||||
.view = view,
|
||||
.mocs = mocs(res->bo, isl_dev),
|
||||
.mocs = iris_mocs(res->bo, isl_dev),
|
||||
.address = res->bo->gtt_offset + res->offset + extra_main_offset,
|
||||
.x_offset_sa = tile_x_sa,
|
||||
.y_offset_sa = tile_y_sa,
|
||||
|
@ -2617,7 +2611,7 @@ iris_create_surface(struct pipe_context *ctx,
|
|||
struct isl_surf_fill_state_info f = {
|
||||
.surf = &isl_surf,
|
||||
.view = view,
|
||||
.mocs = mocs(res->bo, &screen->isl_dev),
|
||||
.mocs = iris_mocs(res->bo, &screen->isl_dev),
|
||||
.address = res->bo->gtt_offset + offset_B,
|
||||
.x_offset_sa = tile_x_sa,
|
||||
.y_offset_sa = tile_y_sa,
|
||||
|
@ -3051,7 +3045,7 @@ iris_set_framebuffer_state(struct pipe_context *ctx,
|
|||
|
||||
info.depth_surf = &zres->surf;
|
||||
info.depth_address = zres->bo->gtt_offset + zres->offset;
|
||||
info.mocs = mocs(zres->bo, isl_dev);
|
||||
info.mocs = iris_mocs(zres->bo, isl_dev);
|
||||
|
||||
view.format = zres->surf.format;
|
||||
|
||||
|
@ -3069,7 +3063,7 @@ iris_set_framebuffer_state(struct pipe_context *ctx,
|
|||
info.stencil_address = stencil_res->bo->gtt_offset + stencil_res->offset;
|
||||
if (!zres) {
|
||||
view.format = stencil_res->surf.format;
|
||||
info.mocs = mocs(stencil_res->bo, isl_dev);
|
||||
info.mocs = iris_mocs(stencil_res->bo, isl_dev);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -3339,7 +3333,7 @@ iris_set_vertex_buffers(struct pipe_context *ctx,
|
|||
vb.BufferSize = res->base.width0 - (int) buffer->buffer_offset;
|
||||
vb.BufferStartingAddress =
|
||||
ro_bo(NULL, res->bo->gtt_offset + (int) buffer->buffer_offset);
|
||||
vb.MOCS = mocs(res->bo, &screen->isl_dev);
|
||||
vb.MOCS = iris_mocs(res->bo, &screen->isl_dev);
|
||||
} else {
|
||||
vb.NullVertexBuffer = true;
|
||||
}
|
||||
|
@ -3641,7 +3635,7 @@ iris_set_stream_output_targets(struct pipe_context *ctx,
|
|||
sob.SOBufferEnable = true;
|
||||
sob.StreamOffsetWriteEnable = true;
|
||||
sob.StreamOutputBufferOffsetAddressEnable = true;
|
||||
sob.MOCS = mocs(res->bo, &screen->isl_dev);
|
||||
sob.MOCS = iris_mocs(res->bo, &screen->isl_dev);
|
||||
|
||||
sob.SurfaceSize = MAX2(tgt->base.buffer_size / 4, 1) - 1;
|
||||
sob.StreamOffset = offset;
|
||||
|
@ -5950,7 +5944,7 @@ iris_upload_dirty_render_state(struct iris_context *ice,
|
|||
vb.BufferStartingAddress =
|
||||
ro_bo(NULL, res->bo->gtt_offset +
|
||||
(int) ice->draw.draw_params.offset);
|
||||
vb.MOCS = mocs(res->bo, &batch->screen->isl_dev);
|
||||
vb.MOCS = iris_mocs(res->bo, &batch->screen->isl_dev);
|
||||
}
|
||||
dynamic_bound |= 1ull << count;
|
||||
count++;
|
||||
|
@ -5972,7 +5966,7 @@ iris_upload_dirty_render_state(struct iris_context *ice,
|
|||
vb.BufferStartingAddress =
|
||||
ro_bo(NULL, res->bo->gtt_offset +
|
||||
(int) ice->draw.derived_draw_params.offset);
|
||||
vb.MOCS = mocs(res->bo, &batch->screen->isl_dev);
|
||||
vb.MOCS = iris_mocs(res->bo, &batch->screen->isl_dev);
|
||||
}
|
||||
dynamic_bound |= 1ull << count;
|
||||
count++;
|
||||
|
@ -6228,7 +6222,7 @@ iris_upload_render_state(struct iris_context *ice,
|
|||
uint32_t ib_packet[GENX(3DSTATE_INDEX_BUFFER_length)];
|
||||
iris_pack_command(GENX(3DSTATE_INDEX_BUFFER), ib_packet, ib) {
|
||||
ib.IndexFormat = draw->index_size >> 1;
|
||||
ib.MOCS = mocs(bo, &batch->screen->isl_dev);
|
||||
ib.MOCS = iris_mocs(bo, &batch->screen->isl_dev);
|
||||
ib.BufferSize = bo->size - offset;
|
||||
ib.BufferStartingAddress = ro_bo(NULL, bo->gtt_offset + offset);
|
||||
}
|
||||
|
@ -7503,7 +7497,6 @@ genX(init_state)(struct iris_context *ice)
|
|||
ice->vtbl.populate_gs_key = iris_populate_gs_key;
|
||||
ice->vtbl.populate_fs_key = iris_populate_fs_key;
|
||||
ice->vtbl.populate_cs_key = iris_populate_cs_key;
|
||||
ice->vtbl.mocs = mocs;
|
||||
ice->vtbl.lost_genx_state = iris_lost_genx_state;
|
||||
|
||||
ice->state.dirty = ~0ull;
|
||||
|
|
Loading…
Reference in New Issue