intel/fs: Refactor predication on sample mask into helper function.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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@ -5316,6 +5316,46 @@ lower_sampler_logical_send(const fs_builder &bld, fs_inst *inst, opcode op)
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}
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}
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/**
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* Predicate the specified instruction on the sample mask.
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*/
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static void
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emit_predicate_on_sample_mask(const fs_builder &bld, fs_inst *inst)
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{
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assert(bld.shader->stage == MESA_SHADER_FRAGMENT &&
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bld.group() == inst->group &&
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bld.dispatch_width() == inst->exec_size);
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const fs_visitor *v = static_cast<const fs_visitor *>(bld.shader);
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const fs_reg sample_mask = sample_mask_reg(bld);
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const unsigned subreg = sample_mask_flag_subreg(v);
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if (brw_wm_prog_data(v->stage_prog_data)->uses_kill) {
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assert(sample_mask.file == ARF &&
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sample_mask.nr == brw_flag_subreg(subreg).nr &&
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sample_mask.subnr == brw_flag_subreg(
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subreg + inst->group / 16).subnr);
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} else {
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bld.group(1, 0).exec_all()
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.MOV(brw_flag_subreg(subreg + inst->group / 16),
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retype(sample_mask, BRW_REGISTER_TYPE_UW));
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}
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if (inst->predicate) {
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assert(inst->predicate == BRW_PREDICATE_NORMAL);
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assert(!inst->predicate_inverse);
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assert(inst->flag_subreg == 0);
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/* Combine the sample mask with the existing predicate by using a
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* vertical predication mode.
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*/
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inst->predicate = BRW_PREDICATE_ALIGN1_ALLV;
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} else {
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inst->flag_subreg = subreg;
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inst->predicate = BRW_PREDICATE_NORMAL;
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inst->predicate_inverse = false;
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}
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}
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static void
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lower_surface_logical_send(const fs_builder &bld, fs_inst *inst)
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{
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@ -5448,29 +5488,8 @@ lower_surface_logical_send(const fs_builder &bld, fs_inst *inst)
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* provided.
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*/
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if ((header.file == BAD_FILE || !is_surface_access) &&
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sample_mask.file != BAD_FILE && sample_mask.file != IMM) {
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const fs_builder ubld = bld.group(1, 0).exec_all();
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if (inst->predicate) {
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assert(inst->predicate == BRW_PREDICATE_NORMAL);
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assert(!inst->predicate_inverse);
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assert(inst->flag_subreg < 2);
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/* Combine the sample mask with the existing predicate by using a
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* vertical predication mode.
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*/
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inst->predicate = BRW_PREDICATE_ALIGN1_ALLV;
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if (sample_mask.file != ARF || sample_mask.nr != BRW_ARF_FLAG + 1)
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ubld.MOV(retype(brw_flag_subreg(inst->flag_subreg + 2),
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sample_mask.type),
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sample_mask);
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} else {
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inst->flag_subreg = 2;
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inst->predicate = BRW_PREDICATE_NORMAL;
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inst->predicate_inverse = false;
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if (sample_mask.file != ARF || sample_mask.nr != BRW_ARF_FLAG + 1)
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ubld.MOV(retype(brw_flag_subreg(inst->flag_subreg), sample_mask.type),
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sample_mask);
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}
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}
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sample_mask.file != BAD_FILE && sample_mask.file != IMM)
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emit_predicate_on_sample_mask(bld, inst);
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uint32_t sfid;
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switch (inst->opcode) {
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@ -5641,17 +5660,8 @@ lower_a64_logical_send(const fs_builder &bld, fs_inst *inst)
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/* If the surface message has side effects and we're a fragment shader, we
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* have to predicate with the sample mask to avoid helper invocations.
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*/
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if (has_side_effects && bld.shader->stage == MESA_SHADER_FRAGMENT) {
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inst->flag_subreg = 2;
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inst->predicate = BRW_PREDICATE_NORMAL;
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inst->predicate_inverse = false;
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fs_reg sample_mask = sample_mask_reg(bld);
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const fs_builder ubld = bld.group(1, 0).exec_all();
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if (sample_mask.file != ARF || sample_mask.nr != BRW_ARF_FLAG + 1)
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ubld.MOV(retype(brw_flag_subreg(inst->flag_subreg), sample_mask.type),
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sample_mask);
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}
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if (has_side_effects && bld.shader->stage == MESA_SHADER_FRAGMENT)
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emit_predicate_on_sample_mask(bld, inst);
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fs_reg payload, payload2;
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unsigned mlen, ex_mlen = 0;
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