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radeonsi: cleanup si_initialize_color_surface 

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Nicolai Hähnle 2017-11-16 07:33:34 +01:00
parent 08f6b4dd7b
commit 1c2d19d84d
1 changed files with 12 additions and 12 deletions
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24
src/gallium/drivers/radeonsi/si_state.c
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@ -2327,15 +2327,12 @@ static void si_initialize_color_surface(struct si_context *sctx,
struct r600_surface *surf) struct r600_surface *surf)
{ {
struct r600_texture *rtex = (struct r600_texture*)surf->base.texture; struct r600_texture *rtex = (struct r600_texture*)surf->base.texture;
unsigned color_info, color_attrib, color_view; unsigned color_info, color_attrib;
unsigned format, swap, ntype, endian; unsigned format, swap, ntype, endian;
const struct util_format_description *desc; const struct util_format_description *desc;
int firstchan; int firstchan;
unsigned blend_clamp = 0, blend_bypass = 0; unsigned blend_clamp = 0, blend_bypass = 0;
color_view = S_028C6C_SLICE_START(surf->base.u.tex.first_layer) |
S_028C6C_SLICE_MAX(surf->base.u.tex.last_layer);
desc = util_format_description(surf->base.format); desc = util_format_description(surf->base.format);
for (firstchan = 0; firstchan < 4; firstchan++) { for (firstchan = 0; firstchan < 4; firstchan++) {
if (desc->channel[firstchan].type != UTIL_FORMAT_TYPE_VOID) { if (desc->channel[firstchan].type != UTIL_FORMAT_TYPE_VOID) {
@ -2432,10 +2429,6 @@ static void si_initialize_color_surface(struct si_context *sctx,
} }
} }
surf->cb_color_view = color_view;
surf->cb_color_info = color_info;
surf->cb_color_attrib = color_attrib;
if (sctx->b.chip_class >= VI) { if (sctx->b.chip_class >= VI) {
unsigned max_uncompressed_block_size = 2; unsigned max_uncompressed_block_size = 2;
@ -2453,20 +2446,27 @@ static void si_initialize_color_surface(struct si_context *sctx,
/* This must be set for fast clear to work without FMASK. */ /* This must be set for fast clear to work without FMASK. */
if (!rtex->fmask.size && sctx->b.chip_class == SI) { if (!rtex->fmask.size && sctx->b.chip_class == SI) {
unsigned bankh = util_logbase2(rtex->surface.u.legacy.bankh); unsigned bankh = util_logbase2(rtex->surface.u.legacy.bankh);
surf->cb_color_attrib |= S_028C74_FMASK_BANK_HEIGHT(bankh); color_attrib |= S_028C74_FMASK_BANK_HEIGHT(bankh);
} }
unsigned color_view = S_028C6C_SLICE_START(surf->base.u.tex.first_layer) |
S_028C6C_SLICE_MAX(surf->base.u.tex.last_layer);
if (sctx->b.chip_class >= GFX9) { if (sctx->b.chip_class >= GFX9) {
unsigned mip0_depth = util_max_layer(&rtex->resource.b.b, 0); unsigned mip0_depth = util_max_layer(&rtex->resource.b.b, 0);
surf->cb_color_view |= S_028C6C_MIP_LEVEL(surf->base.u.tex.level); color_view |= S_028C6C_MIP_LEVEL(surf->base.u.tex.level);
surf->cb_color_attrib |= S_028C74_MIP0_DEPTH(mip0_depth) | color_attrib |= S_028C74_MIP0_DEPTH(mip0_depth) |
S_028C74_RESOURCE_TYPE(rtex->surface.u.gfx9.resource_type); S_028C74_RESOURCE_TYPE(rtex->surface.u.gfx9.resource_type);
surf->cb_color_attrib2 = S_028C68_MIP0_WIDTH(surf->width0 - 1) | surf->cb_color_attrib2 = S_028C68_MIP0_WIDTH(surf->width0 - 1) |
S_028C68_MIP0_HEIGHT(surf->height0 - 1) | S_028C68_MIP0_HEIGHT(surf->height0 - 1) |
S_028C68_MAX_MIP(rtex->resource.b.b.last_level); S_028C68_MAX_MIP(rtex->resource.b.b.last_level);
} }
surf->cb_color_view = color_view;
surf->cb_color_info = color_info;
surf->cb_color_attrib = color_attrib;
/* Determine pixel shader export format */ /* Determine pixel shader export format */
si_choose_spi_color_formats(surf, format, swap, ntype, rtex->is_depth); si_choose_spi_color_formats(surf, format, swap, ntype, rtex->is_depth);