radeonsi: enable TC L2 for tessellation offchip stores
Vulkan does the same thing.
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27439dfdae
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1bc88c02c0
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@ -1049,7 +1049,7 @@ static void store_output_tcs(struct lp_build_tgsi_context *bld_base,
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if (inst->Dst[0].Register.WriteMask != 0xF && !is_tess_factor) {
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ac_build_buffer_store_dword(&ctx->ac, buffer, value, 1,
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buf_addr, base,
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4 * chan_index, 1, 1, 1);
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4 * chan_index, 1, 1, 0);
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}
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}
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@ -1057,7 +1057,7 @@ static void store_output_tcs(struct lp_build_tgsi_context *bld_base,
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LLVMValueRef value = lp_build_gather_values(bld_base->base.gallivm,
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values, 4);
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ac_build_buffer_store_dword(&ctx->ac, buffer, value, 4, buf_addr,
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base, 0, 1, 1, 1);
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base, 0, 1, 1, 0);
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}
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}
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@ -2412,7 +2412,7 @@ static void si_copy_tcs_inputs(struct lp_build_tgsi_context *bld_base)
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lds_ptr);
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ac_build_buffer_store_dword(&ctx->ac, buffer, value, 4, buffer_addr,
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buffer_offset, 0, 1, 1, 1);
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buffer_offset, 0, 1, 1, 0);
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}
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}
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@ -2527,18 +2527,18 @@ static void si_write_tess_factors(struct lp_build_tgsi_context *bld_base,
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ac_build_buffer_store_dword(&ctx->ac, buffer,
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lp_build_const_int32(gallivm, 0x80000000),
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1, lp_build_const_int32(gallivm, 0), tf_base,
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0, 1, 1, 1);
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0, 1, 1, 0);
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lp_build_endif(&inner_if_ctx);
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/* Store the tessellation factors. */
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ac_build_buffer_store_dword(&ctx->ac, buffer, vec0,
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MIN2(stride, 4), byteoffset, tf_base,
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4, 1, 1, 1);
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4, 1, 1, 0);
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if (vec1)
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ac_build_buffer_store_dword(&ctx->ac, buffer, vec1,
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stride - 4, byteoffset, tf_base,
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20, 1, 1, 1);
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20, 1, 1, 0);
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/* Store the tess factors into the offchip buffer if TES reads them. */
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if (shader->key.part.tcs.epilog.tes_reads_tess_factors) {
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@ -2560,7 +2560,7 @@ static void si_write_tess_factors(struct lp_build_tgsi_context *bld_base,
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ac_build_buffer_store_dword(&ctx->ac, buf, outer_vec,
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outer_comps, tf_outer_offset,
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base, 0, 1, 1, 1);
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base, 0, 1, 1, 0);
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if (inner_comps) {
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param_inner = si_shader_io_get_unique_index(
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TGSI_SEMANTIC_TESSINNER, 0);
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@ -2571,7 +2571,7 @@ static void si_write_tess_factors(struct lp_build_tgsi_context *bld_base,
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lp_build_gather_values(gallivm, inner, inner_comps);
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ac_build_buffer_store_dword(&ctx->ac, buf, inner_vec,
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inner_comps, tf_inner_offset,
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base, 0, 1, 1, 1);
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base, 0, 1, 1, 0);
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}
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}
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