radv: enable DCC stores on RDNA2
It seems this gives 2-3% improvements most of the time. This also enables DCC for concurrent images. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10454>
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@ -633,8 +633,6 @@ RADV driver environment variables
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enable wave32 for compute shaders (GFX10+)
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enable wave32 for compute shaders (GFX10+)
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``dccmsaa``
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``dccmsaa``
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enable DCC for MSAA images
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enable DCC for MSAA images
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``dccstores``
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enable DCC for storage images (for performance testing on GFX10.3 only)
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``dfsm``
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``dfsm``
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enable DFSM
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enable DFSM
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``gewave32``
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``gewave32``
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@ -74,7 +74,6 @@ enum {
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RADV_PERFTEST_DFSM = 1u << 6,
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RADV_PERFTEST_DFSM = 1u << 6,
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RADV_PERFTEST_NO_SAM = 1u << 7,
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RADV_PERFTEST_NO_SAM = 1u << 7,
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RADV_PERFTEST_SAM = 1u << 8,
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RADV_PERFTEST_SAM = 1u << 8,
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RADV_PERFTEST_DCC_STORES = 1u << 9,
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};
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};
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bool radv_init_trace(struct radv_device *device);
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bool radv_init_trace(struct radv_device *device);
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@ -816,7 +816,7 @@ static const struct debug_control radv_perftest_options[] = {
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{"cswave32", RADV_PERFTEST_CS_WAVE_32}, {"pswave32", RADV_PERFTEST_PS_WAVE_32},
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{"cswave32", RADV_PERFTEST_CS_WAVE_32}, {"pswave32", RADV_PERFTEST_PS_WAVE_32},
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{"gewave32", RADV_PERFTEST_GE_WAVE_32}, {"dfsm", RADV_PERFTEST_DFSM},
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{"gewave32", RADV_PERFTEST_GE_WAVE_32}, {"dfsm", RADV_PERFTEST_DFSM},
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{"nosam", RADV_PERFTEST_NO_SAM}, {"sam", RADV_PERFTEST_SAM},
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{"nosam", RADV_PERFTEST_NO_SAM}, {"sam", RADV_PERFTEST_SAM},
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{"dccstores", RADV_PERFTEST_DCC_STORES}, {NULL, 0}};
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{NULL, 0}};
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const char *
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const char *
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radv_get_perftest_option_name(int id)
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radv_get_perftest_option_name(int id)
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@ -276,14 +276,7 @@ radv_use_dcc_for_image(struct radv_device *device, const struct radv_image *imag
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bool
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bool
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radv_image_use_dcc_image_stores(const struct radv_device *device, const struct radv_image *image)
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radv_image_use_dcc_image_stores(const struct radv_device *device, const struct radv_image *image)
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{
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{
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/*
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return device->physical_device->rad_info.chip_class >= GFX10;
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* TODO: Enable on more HW. DIMGREY and VANGOGH need a workaround and
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* we need more perf analysis.
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* https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6796#note_643853
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*/
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return device->physical_device->rad_info.chip_class == GFX10 ||
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(device->physical_device->rad_info.chip_class == GFX10_3 &&
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(device->instance->perftest_flags & RADV_PERFTEST_DCC_STORES));
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}
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}
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/*
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/*
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