intel/isl: Replace switch statements of doom with a macro
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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@ -1742,6 +1742,42 @@ isl_surf_get_ccs_surf(const struct isl_device *dev,
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.tiling_flags = ISL_TILING_CCS_BIT);
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}
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#define isl_genX_call(dev, func, ...) \
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switch (ISL_DEV_GEN(dev)) { \
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case 4: \
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/* G45 surface state is the same as gen5 */ \
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if (ISL_DEV_IS_G4X(dev)) { \
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isl_gen5_##func(__VA_ARGS__); \
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} else { \
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isl_gen4_##func(__VA_ARGS__); \
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} \
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break; \
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case 5: \
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isl_gen5_##func(__VA_ARGS__); \
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break; \
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case 6: \
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isl_gen6_##func(__VA_ARGS__); \
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break; \
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case 7: \
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if (ISL_DEV_IS_HASWELL(dev)) { \
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isl_gen75_##func(__VA_ARGS__); \
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} else { \
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isl_gen7_##func(__VA_ARGS__); \
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} \
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break; \
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case 8: \
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isl_gen8_##func(__VA_ARGS__); \
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break; \
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case 9: \
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isl_gen9_##func(__VA_ARGS__); \
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break; \
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case 10: \
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isl_gen10_##func(__VA_ARGS__); \
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break; \
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default: \
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assert(!"Unknown hardware generation"); \
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}
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void
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isl_surf_fill_state_s(const struct isl_device *dev, void *state,
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const struct isl_surf_fill_state_info *restrict info)
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@ -1765,74 +1801,14 @@ isl_surf_fill_state_s(const struct isl_device *dev, void *state,
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info->surf->logical_level0_px.array_len);
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}
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switch (ISL_DEV_GEN(dev)) {
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case 4:
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if (ISL_DEV_IS_G4X(dev)) {
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/* G45 surface state is the same as gen5 */
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isl_gen5_surf_fill_state_s(dev, state, info);
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} else {
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isl_gen4_surf_fill_state_s(dev, state, info);
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}
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break;
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case 5:
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isl_gen5_surf_fill_state_s(dev, state, info);
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break;
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case 6:
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isl_gen6_surf_fill_state_s(dev, state, info);
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break;
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case 7:
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if (ISL_DEV_IS_HASWELL(dev)) {
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isl_gen75_surf_fill_state_s(dev, state, info);
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} else {
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isl_gen7_surf_fill_state_s(dev, state, info);
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}
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break;
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case 8:
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isl_gen8_surf_fill_state_s(dev, state, info);
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break;
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case 9:
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isl_gen9_surf_fill_state_s(dev, state, info);
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break;
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case 10:
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isl_gen10_surf_fill_state_s(dev, state, info);
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break;
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default:
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assert(!"Cannot fill surface state for this gen");
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}
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isl_genX_call(dev, surf_fill_state_s, dev, state, info);
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}
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void
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isl_buffer_fill_state_s(const struct isl_device *dev, void *state,
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const struct isl_buffer_fill_state_info *restrict info)
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{
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switch (ISL_DEV_GEN(dev)) {
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case 4:
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case 5:
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/* Gen 4-5 are all the same when it comes to buffer surfaces */
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isl_gen5_buffer_fill_state_s(state, info);
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break;
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case 6:
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isl_gen6_buffer_fill_state_s(state, info);
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break;
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case 7:
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if (ISL_DEV_IS_HASWELL(dev)) {
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isl_gen75_buffer_fill_state_s(state, info);
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} else {
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isl_gen7_buffer_fill_state_s(state, info);
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}
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break;
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case 8:
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isl_gen8_buffer_fill_state_s(state, info);
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break;
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case 9:
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isl_gen9_buffer_fill_state_s(state, info);
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break;
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case 10:
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isl_gen10_buffer_fill_state_s(state, info);
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break;
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default:
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assert(!"Cannot fill surface state for this gen");
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}
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isl_genX_call(dev, buffer_fill_state_s, state, info);
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}
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void
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@ -1869,40 +1845,7 @@ isl_emit_depth_stencil_hiz_s(const struct isl_device *dev, void *batch,
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}
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}
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switch (ISL_DEV_GEN(dev)) {
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case 4:
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if (ISL_DEV_IS_G4X(dev)) {
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/* G45 surface state is the same as gen5 */
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isl_gen5_emit_depth_stencil_hiz_s(dev, batch, info);
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} else {
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isl_gen4_emit_depth_stencil_hiz_s(dev, batch, info);
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}
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break;
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case 5:
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isl_gen5_emit_depth_stencil_hiz_s(dev, batch, info);
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break;
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case 6:
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isl_gen6_emit_depth_stencil_hiz_s(dev, batch, info);
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break;
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case 7:
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if (ISL_DEV_IS_HASWELL(dev)) {
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isl_gen75_emit_depth_stencil_hiz_s(dev, batch, info);
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} else {
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isl_gen7_emit_depth_stencil_hiz_s(dev, batch, info);
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}
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break;
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case 8:
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isl_gen8_emit_depth_stencil_hiz_s(dev, batch, info);
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break;
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case 9:
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isl_gen9_emit_depth_stencil_hiz_s(dev, batch, info);
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break;
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case 10:
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isl_gen10_emit_depth_stencil_hiz_s(dev, batch, info);
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break;
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default:
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assert(!"Cannot fill surface state for this gen");
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}
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isl_genX_call(dev, emit_depth_stencil_hiz_s, dev, batch, info);
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}
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/**
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