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r600: various cleanups 

- max texture size is 8k, but mesa doesn't support
that at the moment.
- attempt to set shader limits to what the hw actually
supports
- clean up some old r300 cruft
- no need to explicitly disable irqs.  This is fixed
in the drm now.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
This commit is contained in:
Alex Deucher 2009-09-21 16:30:14 -04:00
parent 734a498ed4
commit 1869bdabba
3 changed files with 23 additions and 44 deletions
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41
src/mesa/drivers/dri/r600/r600_context.c
View File

@ -284,8 +284,8 @@ GLboolean r600CreateContext(const __GLcontextModes * glVisual,
ctx->Const.MaxTextureMaxAnisotropy = 16.0;
ctx->Const.MaxTextureLodBias = 16.0;
ctx->Const.MaxTextureLevels = 13;
ctx->Const.MaxTextureRectSize = 4096;
ctx->Const.MaxTextureLevels = 13; /* hw support 14 */
ctx->Const.MaxTextureRectSize = 4096; /* hw support 8192 */
ctx->Const.MinPointSize = 0x0001 / 8.0;
ctx->Const.MinPointSizeAA = 0x0001 / 8.0;
@ -331,25 +331,26 @@ GLboolean r600CreateContext(const __GLcontextModes * glVisual,
_tnl_allow_vertex_fog(ctx, GL_TRUE);
/* currently bogus data */
ctx->Const.VertexProgram.MaxInstructions = VSF_MAX_FRAGMENT_LENGTH / 4;
ctx->Const.VertexProgram.MaxNativeInstructions =
VSF_MAX_FRAGMENT_LENGTH / 4;
ctx->Const.VertexProgram.MaxNativeAttribs = 16; /* r420 */
ctx->Const.VertexProgram.MaxTemps = 32;
ctx->Const.VertexProgram.MaxNativeTemps =
/*VSF_MAX_FRAGMENT_TEMPS */ 32;
ctx->Const.VertexProgram.MaxNativeParameters = 256; /* r420 */
ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
ctx->Const.VertexProgram.MaxInstructions = 8192; /* in theory no limit */
ctx->Const.VertexProgram.MaxNativeInstructions = 8192;
ctx->Const.VertexProgram.MaxNativeAttribs = 160;
ctx->Const.VertexProgram.MaxTemps = 256; /* 256 for reg-based constants, inline consts also supported */
ctx->Const.VertexProgram.MaxNativeTemps = 256;
ctx->Const.VertexProgram.MaxNativeParameters = 256; /* ??? */
ctx->Const.VertexProgram.MaxNativeAddressRegs = 1; /* ??? */
ctx->Const.FragmentProgram.MaxNativeTemps = PFS_NUM_TEMP_REGS;
ctx->Const.FragmentProgram.MaxNativeAttribs = 11; /* copy i915... */
ctx->Const.FragmentProgram.MaxNativeParameters = PFS_NUM_CONST_REGS;
ctx->Const.FragmentProgram.MaxNativeAluInstructions = PFS_MAX_ALU_INST;
ctx->Const.FragmentProgram.MaxNativeTexInstructions = PFS_MAX_TEX_INST;
ctx->Const.FragmentProgram.MaxNativeInstructions =
PFS_MAX_ALU_INST + PFS_MAX_TEX_INST;
ctx->Const.FragmentProgram.MaxNativeTexIndirections =
PFS_MAX_TEX_INDIRECT;
ctx->Const.FragmentProgram.MaxNativeTemps = 256;
ctx->Const.FragmentProgram.MaxNativeAttribs = 32;
ctx->Const.FragmentProgram.MaxNativeParameters = 256;
ctx->Const.FragmentProgram.MaxNativeAluInstructions = 8192;
/* 8 per clause on r6xx, 16 on rv670/r7xx */
if ((screen->chip_family == CHIP_FAMILY_RV670) ||
(screen->chip_family >= CHIP_FAMILY_RV770))
ctx->Const.FragmentProgram.MaxNativeTexInstructions = 16;
else
ctx->Const.FragmentProgram.MaxNativeTexInstructions = 8;
ctx->Const.FragmentProgram.MaxNativeInstructions = 8192;
ctx->Const.FragmentProgram.MaxNativeTexIndirections = 8; /* ??? */
ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0; /* and these are?? */
ctx->VertexProgram._MaintainTnlProgram = GL_TRUE;
ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;

19
src/mesa/drivers/dri/r600/r600_context.h
View File

@ -86,29 +86,10 @@ extern int hw_tcl_on;
#include "tnl_dd/t_dd_vertex.h"
#undef TAG
#define PFS_MAX_ALU_INST 64
#define PFS_MAX_TEX_INST 64
#define PFS_MAX_TEX_INDIRECT 4
#define PFS_NUM_TEMP_REGS 32
#define PFS_NUM_CONST_REGS 16
#define R600_MAX_AOS_ARRAYS 16
#define REG_COORDS 0
#define REG_COLOR0 1
#define REG_TEX0 2
#define R600_FALLBACK_NONE 0
#define R600_FALLBACK_TCL 1
#define R600_FALLBACK_RAST 2
enum
{
NO_SHIFT = 0,
LEFT_SHIFT = 1,
RIGHT_SHIFT = 2,
};
struct r600_hw_state {
struct radeon_state_atom sq;
struct radeon_state_atom db;

7
src/mesa/drivers/dri/radeon/radeon_common_context.c
View File

@ -227,11 +227,8 @@ GLboolean radeonInitContext(radeonContextPtr radeon,
fthrottle_mode = driQueryOptioni(&radeon->optionCache, "fthrottle_mode");
radeon->iw.irq_seq = -1;
radeon->irqsEmitted = 0;
if (IS_R600_CLASS(radeon->radeonScreen))
radeon->do_irqs = 0;
else
radeon->do_irqs = (fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS &&
radeon->radeonScreen->irq);
radeon->do_irqs = (fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS &&
radeon->radeonScreen->irq);
radeon->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);