KonstantinSeurer
/
mesa
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

intel/fs: Disable SIMD32 dispatch on Gen4-6 with control flow 

The hardware's control flow logic is 16-wide so we're out of luck
here.  We could, in theory, support SIMD32 if we know the control-flow
is uniform but we don't have that information at this point.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Francisco Jerez 2016-04-25 17:29:57 -07:00 committed by Jason Ekstrand
parent d5b617a28e
commit 1811cbdc25
1 changed files with 8 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
src/intel/compiler/brw_fs_nir.cpp
View File

@ -385,6 +385,10 @@ fs_visitor::nir_emit_if(nir_if *if_stmt)
nir_emit_cf_list(&if_stmt->else_list);
bld.emit(BRW_OPCODE_ENDIF);
if (devinfo->gen < 7)
limit_dispatch_width(16, "Non-uniform control flow unsupported "
"in SIMD32 mode.");
}
void
@ -395,6 +399,10 @@ fs_visitor::nir_emit_loop(nir_loop *loop)
nir_emit_cf_list(&loop->body);
bld.emit(BRW_OPCODE_WHILE);
if (devinfo->gen < 7)
limit_dispatch_width(16, "Non-uniform control flow unsupported "
"in SIMD32 mode.");
}
void