intel/ir: Represent logical edge of BREAK instruction.
Currently only the physical back-edge is represented, which incidentally also leads to the exit block of the loop, but we need the direct logical edge in addition for our logical CFG representation to be complete. Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
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@ -352,6 +352,7 @@ cfg_t::cfg_t(exec_list *instructions)
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*/
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assert(cur_do != NULL);
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cur->add_successor(mem_ctx, cur_do, bblock_link_physical);
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cur->add_successor(mem_ctx, cur_while, bblock_link_logical);
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next = new_block();
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if (inst->predicate)
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