diff --git a/src/gallium/drivers/r600/evergreen_hw_context.c b/src/gallium/drivers/r600/evergreen_hw_context.c
index d553944eb41..483021f8bcd 100644
--- a/src/gallium/drivers/r600/evergreen_hw_context.c
+++ b/src/gallium/drivers/r600/evergreen_hw_context.c
@@ -27,13 +27,7 @@
 #include "evergreend.h"
 #include "util/u_memory.h"
 
-static const struct r600_reg evergreen_config_reg_list[] = {
-	{R_008958_VGT_PRIMITIVE_TYPE, 0},
-};
-
-
 static const struct r600_reg cayman_config_reg_list[] = {
-	{R_008958_VGT_PRIMITIVE_TYPE, 0, 0},
 	{R_009100_SPI_CONFIG_CNTL, REG_FLAG_ENABLE_ALWAYS | REG_FLAG_FLUSH_CHANGE, 0},
 	{R_00913C_SPI_CONFIG_CNTL_1, REG_FLAG_ENABLE_ALWAYS | REG_FLAG_FLUSH_CHANGE, 0},
 };
@@ -148,9 +142,7 @@ static const struct r600_reg evergreen_context_reg_list[] = {
 	{R_028A00_PA_SU_POINT_SIZE, 0, 0},
 	{R_028A04_PA_SU_POINT_MINMAX, 0, 0},
 	{R_028A08_PA_SU_LINE_CNTL, 0, 0},
-	{R_028A0C_PA_SC_LINE_STIPPLE, 0, 0},
 	{R_028A48_PA_SC_MODE_CNTL_0, 0, 0},
-	{R_028A6C_VGT_GS_OUT_PRIM_TYPE, 0, 0},
 	{R_028ABC_DB_HTILE_SURFACE, 0, 0},
 	{R_028B54_VGT_SHADER_STAGES_EN, 0, 0},
 	{R_028B70_DB_ALPHA_TO_MASK, 0, 0},
@@ -449,9 +441,7 @@ static const struct r600_reg cayman_context_reg_list[] = {
 	{R_028A00_PA_SU_POINT_SIZE, 0, 0},
 	{R_028A04_PA_SU_POINT_MINMAX, 0, 0},
 	{R_028A08_PA_SU_LINE_CNTL, 0, 0},
-	{R_028A0C_PA_SC_LINE_STIPPLE, 0, 0},
 	{R_028A48_PA_SC_MODE_CNTL_0, 0, 0},
-	{R_028A6C_VGT_GS_OUT_PRIM_TYPE, 0, 0},
 	{R_028ABC_DB_HTILE_SURFACE, 0, 0},
 	{R_028B54_VGT_SHADER_STAGES_EN, 0, 0},
 	{R_028B70_DB_ALPHA_TO_MASK, 0, 0},
@@ -658,15 +648,12 @@ static int evergreen_loop_const_init(struct r600_context *ctx, uint32_t offset)
 
 int evergreen_context_init(struct r600_context *ctx)
 {
-	int r;
+	int r = 0;
 
 	/* add blocks */
 	if (ctx->family >= CHIP_CAYMAN)
 		r = r600_context_add_block(ctx, cayman_config_reg_list,
 					   Elements(cayman_config_reg_list), PKT3_SET_CONFIG_REG, EVERGREEN_CONFIG_REG_OFFSET);
-	else
-		r = r600_context_add_block(ctx, evergreen_config_reg_list,
-					   Elements(evergreen_config_reg_list), PKT3_SET_CONFIG_REG, EVERGREEN_CONFIG_REG_OFFSET);
 	if (r)
 		goto out_err;
 	if (ctx->family >= CHIP_CAYMAN)
diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c
index 13a4823a096..57dcc7e3d92 100644
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -226,7 +226,6 @@ int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg,
 
 /* R600/R700 configuration */
 static const struct r600_reg r600_config_reg_list[] = {
-	{R_008958_VGT_PRIMITIVE_TYPE, 0, 0},
 	{R_008B40_PA_SC_AA_SAMPLE_LOCS_2S, 0, 0},
 	{R_008B44_PA_SC_AA_SAMPLE_LOCS_4S, 0, 0},
 	{R_008B48_PA_SC_AA_SAMPLE_LOCS_8S_WD0, 0, 0},
@@ -348,7 +347,6 @@ static const struct r600_reg r600_context_reg_list[] = {
 	{R_028004_DB_DEPTH_VIEW, 0, 0},
 	{GROUP_FORCE_NEW_BLOCK, 0, 0},
 	{R_028010_DB_DEPTH_INFO, REG_FLAG_NEED_BO, 0},
-	{R_028A6C_VGT_GS_OUT_PRIM_TYPE, 0, 0},
 	{R_028D24_DB_HTILE_SURFACE, 0, 0},
 	{R_028D34_DB_PREFETCH_LIMIT, 0, 0},
 	{R_028D44_DB_ALPHA_TO_MASK, 0, 0},
@@ -361,7 +359,6 @@ static const struct r600_reg r600_context_reg_list[] = {
 	{R_028A00_PA_SU_POINT_SIZE, 0, 0},
 	{R_028A04_PA_SU_POINT_MINMAX, 0, 0},
 	{R_028A08_PA_SU_LINE_CNTL, 0, 0},
-	{R_028A0C_PA_SC_LINE_STIPPLE, 0, 0},
 	{R_028C00_PA_SC_LINE_CNTL, 0, 0},
 	{R_028C04_PA_SC_AA_CONFIG, 0, 0},
 	{R_028C08_PA_SU_VTX_CNTL, 0, 0},
@@ -1069,6 +1066,9 @@ void r600_begin_new_cs(struct r600_context *ctx)
 		ctx->pm4_dirty_cdwords += enable_block->pm4_ndwords;
 		enable_block->nreg_dirty = enable_block->nreg;
 	}
+
+	/* Re-emit the primitive type. */
+	ctx->last_primitive_type = -1;
 }
 
 void r600_context_emit_fence(struct r600_context *ctx, struct r600_resource *fence_bo, unsigned offset, unsigned value)
diff --git a/src/gallium/drivers/r600/r600_hw_context_priv.h b/src/gallium/drivers/r600/r600_hw_context_priv.h
index 71bfbd18d1c..332696347c3 100644
--- a/src/gallium/drivers/r600/r600_hw_context_priv.h
+++ b/src/gallium/drivers/r600/r600_hw_context_priv.h
@@ -30,7 +30,7 @@
 
 /* the number of CS dwords for flushing and drawing */
 #define R600_MAX_FLUSH_CS_DWORDS 44
-#define R600_MAX_DRAW_CS_DWORDS 13
+#define R600_MAX_DRAW_CS_DWORDS 22
 
 /* these flags are used in register flags and added into block flags */
 #define REG_FLAG_NEED_BO 1
diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index 9797304ed21..27d57d17547 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -475,6 +475,9 @@ struct r600_context {
 	 * for anything useful. */
 	struct r600_resource *dummy_fmask;
 	struct r600_resource *dummy_cmask;
+
+	/* Last primitive type used in draw_vbo. */
+	int last_primitive_type;
 };
 
 static INLINE void r600_emit_atom(struct r600_context *rctx, struct r600_atom *atom)
diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index dd21e0bdfe3..8ff0cdf4201 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -99,9 +99,9 @@ static void r600_texture_barrier(struct pipe_context *ctx)
 	}
 }
 
-static bool r600_conv_pipe_prim(unsigned pprim, unsigned *prim)
+static unsigned r600_conv_pipe_prim(unsigned prim)
 {
-	static const int prim_conv[] = {
+	static const unsigned prim_conv[] = {
 		V_008958_DI_PT_POINTLIST,
 		V_008958_DI_PT_LINELIST,
 		V_008958_DI_PT_LINELOOP,
@@ -112,19 +112,13 @@ static bool r600_conv_pipe_prim(unsigned pprim, unsigned *prim)
 		V_008958_DI_PT_QUADLIST,
 		V_008958_DI_PT_QUADSTRIP,
 		V_008958_DI_PT_POLYGON,
-		-1,
-		-1,
-		-1,
-		-1,
+		V_008958_DI_PT_LINELIST_ADJ,
+		V_008958_DI_PT_LINESTRIP_ADJ,
+		V_008958_DI_PT_TRILIST_ADJ,
+		V_008958_DI_PT_TRISTRIP_ADJ,
 		V_008958_DI_PT_RECTLIST
 	};
-
-	*prim = prim_conv[pprim];
-	if (*prim == -1) {
-		fprintf(stderr, "%s:%d unsupported %d\n", __func__, __LINE__, pprim);
-		return false;
-	}
-	return true;
+	return prim_conv[prim];
 }
 
 /* common state between evergreen and r600 */
@@ -1166,14 +1160,13 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info
 	struct r600_context *rctx = (struct r600_context *)ctx;
 	struct pipe_draw_info info = *dinfo;
 	struct pipe_index_buffer ib = {};
-	unsigned prim, ls_mask = 0, i;
+	unsigned i;
 	struct r600_block *dirty_block = NULL, *next_block = NULL;
 	struct radeon_winsys_cs *cs = rctx->cs;
 	uint64_t va;
 	uint8_t *ptr;
 
-	if ((!info.count && (info.indexed || !info.count_from_stream_output)) ||
-	    !r600_conv_pipe_prim(info.mode, &prim)) {
+	if (!info.count && (info.indexed || !info.count_from_stream_output)) {
 		assert(0);
 		return;
 	}
@@ -1207,30 +1200,17 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info
 	if (rctx->vgt.id != R600_PIPE_STATE_VGT) {
 		rctx->vgt.id = R600_PIPE_STATE_VGT;
 		rctx->vgt.nregs = 0;
-		r600_pipe_state_add_reg(&rctx->vgt, R_008958_VGT_PRIMITIVE_TYPE, prim);
-		r600_pipe_state_add_reg(&rctx->vgt, R_028A6C_VGT_GS_OUT_PRIM_TYPE, 0);
 		r600_pipe_state_add_reg(&rctx->vgt, R_028408_VGT_INDX_OFFSET, info.index_bias);
 		r600_pipe_state_add_reg(&rctx->vgt, R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, info.restart_index);
 		r600_pipe_state_add_reg(&rctx->vgt, R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, info.primitive_restart);
 		r600_pipe_state_add_reg(&rctx->vgt, R_03CFF4_SQ_VTX_START_INST_LOC, info.start_instance);
-		r600_pipe_state_add_reg(&rctx->vgt, R_028A0C_PA_SC_LINE_STIPPLE, 0);
 	}
 
 	rctx->vgt.nregs = 0;
-	r600_pipe_state_mod_reg(&rctx->vgt, prim);
-	r600_pipe_state_mod_reg(&rctx->vgt, r600_conv_prim_to_gs_out(info.mode));
 	r600_pipe_state_mod_reg(&rctx->vgt, info.index_bias);
 	r600_pipe_state_mod_reg(&rctx->vgt, info.restart_index);
 	r600_pipe_state_mod_reg(&rctx->vgt, info.primitive_restart);
 	r600_pipe_state_mod_reg(&rctx->vgt, info.start_instance);
-
-	if (prim == V_008958_DI_PT_LINELIST)
-		ls_mask = 1;
-	else if (prim == V_008958_DI_PT_LINESTRIP ||
-		 prim == V_008958_DI_PT_LINELOOP)
-		ls_mask = 2;
-	r600_pipe_state_mod_reg(&rctx->vgt, S_028A0C_AUTO_RESET_CNTL(ls_mask) | rctx->pa_sc_line_stipple);
-
 	r600_context_pipe_state_set(rctx, &rctx->vgt);
 
 	/* Enable stream out if needed. */
@@ -1254,7 +1234,27 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info
 	}
 	rctx->pm4_dirty_cdwords = 0;
 
-	/* draw packet */
+	/* Update the primitive type. */
+	if (rctx->last_primitive_type != info.mode) {
+		unsigned ls_mask = 0;
+
+		if (info.mode == PIPE_PRIM_LINES)
+			ls_mask = 1;
+		else if (info.mode == PIPE_PRIM_LINE_STRIP ||
+			 info.mode == PIPE_PRIM_LINE_LOOP)
+			ls_mask = 2;
+
+		r600_write_context_reg(cs, R_028A0C_PA_SC_LINE_STIPPLE,
+				       S_028A0C_AUTO_RESET_CNTL(ls_mask) | rctx->pa_sc_line_stipple);
+		r600_write_context_reg(cs, R_028A6C_VGT_GS_OUT_PRIM_TYPE,
+				       r600_conv_prim_to_gs_out(info.mode));
+		r600_write_config_reg(cs, R_008958_VGT_PRIMITIVE_TYPE,
+				      r600_conv_pipe_prim(info.mode));
+
+		rctx->last_primitive_type = info.mode;
+	}
+
+	/* Draw packets. */
 	cs->buf[cs->cdw++] = PKT3(PKT3_NUM_INSTANCES, 0, rctx->predicate_drawing);
 	cs->buf[cs->cdw++] = info.instance_count;
 	if (info.indexed) {