radv: bump texel offsets to align with radeonsi

it appears from the amdgpu-pro results the hw can do more,
but let's just align with radeonsi for now.

No CTS regressions.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Dave Airlie 2016-12-22 10:35:46 +10:00
parent d55835b8bd
commit 14737bcdd5
1 changed files with 4 additions and 4 deletions

View File

@ -496,10 +496,10 @@ void radv_GetPhysicalDeviceProperties(
.minTexelBufferOffsetAlignment = 1, .minTexelBufferOffsetAlignment = 1,
.minUniformBufferOffsetAlignment = 4, .minUniformBufferOffsetAlignment = 4,
.minStorageBufferOffsetAlignment = 4, .minStorageBufferOffsetAlignment = 4,
.minTexelOffset = -8, .minTexelOffset = -32,
.maxTexelOffset = 7, .maxTexelOffset = 31,
.minTexelGatherOffset = -8, .minTexelGatherOffset = -32,
.maxTexelGatherOffset = 7, .maxTexelGatherOffset = 31,
.minInterpolationOffset = 0, /* FIXME */ .minInterpolationOffset = 0, /* FIXME */
.maxInterpolationOffset = 0, /* FIXME */ .maxInterpolationOffset = 0, /* FIXME */
.subPixelInterpolationOffsetBits = 0, /* FIXME */ .subPixelInterpolationOffsetBits = 0, /* FIXME */