radeonsi: adjust clip discard based on line width / point size
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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parent
63680471f9
commit
146c2b7c28
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@ -858,6 +858,7 @@ static void *si_create_rs_state(struct pipe_context *ctx,
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rs->line_stipple_enable = state->line_stipple_enable;
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rs->poly_stipple_enable = state->poly_stipple_enable;
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rs->line_smooth = state->line_smooth;
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rs->line_width = state->line_width;
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rs->poly_smooth = state->poly_smooth;
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rs->uses_poly_offset = state->offset_point || state->offset_line ||
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state->offset_tri;
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@ -897,6 +898,8 @@ static void *si_create_rs_state(struct pipe_context *ctx,
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psize_min = state->point_size;
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psize_max = state->point_size;
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}
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rs->max_point_size = psize_max;
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/* Divide by two, because 0.5 = 1 pixel. */
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si_pm4_set_reg(pm4, R_028A04_PA_SU_POINT_MINMAX,
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S_028A04_MIN_SIZE(si_pack_float_12p4(psize_min/2)) |
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@ -1007,7 +1010,9 @@ static void si_bind_rs_state(struct pipe_context *ctx, void *state)
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si_update_poly_offset_state(sctx);
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if (!old_rs ||
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old_rs->scissor_enable != rs->scissor_enable) {
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(old_rs->scissor_enable != rs->scissor_enable ||
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old_rs->line_width != rs->line_width ||
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old_rs->max_point_size != rs->max_point_size)) {
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sctx->scissors.dirty_mask = (1 << SI_MAX_VIEWPORTS) - 1;
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si_mark_atom_dirty(sctx, &sctx->scissors.atom);
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}
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@ -68,6 +68,8 @@ struct si_state_rasterizer {
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struct si_pm4_state *pm4_poly_offset;
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unsigned pa_sc_line_stipple;
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unsigned pa_cl_clip_cntl;
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float line_width;
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float max_point_size;
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unsigned sprite_coord_enable:8;
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unsigned clip_plane_enable:8;
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unsigned flatshade:1;
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@ -187,17 +187,26 @@ static void si_emit_guardband(struct si_context *ctx,
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discard_x = 1.0;
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discard_y = 1.0;
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if (ctx->current_rast_prim < PIPE_PRIM_TRIANGLES) {
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if (unlikely(ctx->current_rast_prim < PIPE_PRIM_TRIANGLES) &&
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ctx->queued.named.rasterizer) {
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/* When rendering wide points or lines, we need to be more
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* conservative about when to discard them entirely. Since
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* point size can be determined by the VS output, we basically
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* disable discard completely completely here.
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*
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* TODO: This can hurt performance when rendering lines and
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* points with fixed size, and could be improved.
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*/
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discard_x = guardband_x;
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discard_y = guardband_y;
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* conservative about when to discard them entirely. */
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const struct si_state_rasterizer *rs = ctx->queued.named.rasterizer;
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float pixels;
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if (ctx->current_rast_prim == PIPE_PRIM_POINTS)
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pixels = rs->max_point_size;
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else
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pixels = rs->line_width;
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/* Add half the point size / line width */
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discard_x += pixels / (2.0 * vp.scale[0]);
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discard_y += pixels / (2.0 * vp.scale[1]);
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/* Discard primitives that would lie entirely outside the clip
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* region. */
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discard_x = MIN2(discard_x, guardband_x);
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discard_y = MIN2(discard_y, guardband_y);
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}
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/* If any of the GB registers is updated, all of them must be updated. */
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