anv: Add pipeline_has_stage guards a few places
All of these worked before because they were depending on prog_data to be null. Soon, we won't be able to depend on a nice prog_data pointer and it's nice to be more explicit anyway. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Cc: "12.0" <mesa-stable@lists.freedesktop.org>
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@ -738,20 +738,26 @@ anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
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{
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{
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struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
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struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
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struct anv_subpass *subpass = cmd_buffer->state.subpass;
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struct anv_subpass *subpass = cmd_buffer->state.subpass;
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struct anv_pipeline_bind_map *map;
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struct anv_pipeline *pipeline;
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uint32_t bias, state_offset;
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uint32_t bias, state_offset;
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switch (stage) {
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switch (stage) {
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case MESA_SHADER_COMPUTE:
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case MESA_SHADER_COMPUTE:
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map = &cmd_buffer->state.compute_pipeline->bindings[stage];
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pipeline = cmd_buffer->state.compute_pipeline;
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bias = 1;
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bias = 1;
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break;
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break;
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default:
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default:
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map = &cmd_buffer->state.pipeline->bindings[stage];
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pipeline = cmd_buffer->state.pipeline;
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bias = 0;
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bias = 0;
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break;
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break;
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}
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}
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if (!anv_pipeline_has_stage(pipeline, stage)) {
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*bt_state = (struct anv_state) { 0, };
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return VK_SUCCESS;
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}
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struct anv_pipeline_bind_map *map = &pipeline->bindings[stage];
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if (bias + map->surface_count == 0) {
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if (bias + map->surface_count == 0) {
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*bt_state = (struct anv_state) { 0, };
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*bt_state = (struct anv_state) { 0, };
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return VK_SUCCESS;
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return VK_SUCCESS;
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@ -904,13 +910,19 @@ VkResult
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anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer *cmd_buffer,
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anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer *cmd_buffer,
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gl_shader_stage stage, struct anv_state *state)
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gl_shader_stage stage, struct anv_state *state)
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{
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{
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struct anv_pipeline_bind_map *map;
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struct anv_pipeline *pipeline;
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if (stage == MESA_SHADER_COMPUTE)
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if (stage == MESA_SHADER_COMPUTE)
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map = &cmd_buffer->state.compute_pipeline->bindings[stage];
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pipeline = cmd_buffer->state.compute_pipeline;
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else
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else
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map = &cmd_buffer->state.pipeline->bindings[stage];
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pipeline = cmd_buffer->state.pipeline;
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if (!anv_pipeline_has_stage(pipeline, stage)) {
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*state = (struct anv_state) { 0, };
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return VK_SUCCESS;
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}
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struct anv_pipeline_bind_map *map = &pipeline->bindings[stage];
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if (map->sampler_count == 0) {
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if (map->sampler_count == 0) {
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*state = (struct anv_state) { 0, };
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*state = (struct anv_state) { 0, };
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return VK_SUCCESS;
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return VK_SUCCESS;
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@ -1077,6 +1089,10 @@ struct anv_state
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anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
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anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
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gl_shader_stage stage)
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gl_shader_stage stage)
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{
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{
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/* If we don't have this stage, bail. */
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if (!anv_pipeline_has_stage(cmd_buffer->state.pipeline, stage))
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return (struct anv_state) { .offset = 0 };
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struct anv_push_constants *data =
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struct anv_push_constants *data =
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cmd_buffer->state.push_constants[stage];
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cmd_buffer->state.push_constants[stage];
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const struct brw_stage_prog_data *prog_data =
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const struct brw_stage_prog_data *prog_data =
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@ -1520,6 +1520,13 @@ struct anv_pipeline {
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} gen9;
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} gen9;
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};
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};
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static inline bool
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anv_pipeline_has_stage(const struct anv_pipeline *pipeline,
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gl_shader_stage stage)
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{
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return (pipeline->active_stages & mesa_to_vk_shader_stage(stage)) != 0;
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}
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static inline const struct brw_vs_prog_data *
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static inline const struct brw_vs_prog_data *
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get_vs_prog_data(struct anv_pipeline *pipeline)
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get_vs_prog_data(struct anv_pipeline *pipeline)
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{
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{
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@ -315,10 +315,13 @@ get_pipeline_state_l3_weights(const struct anv_pipeline *pipeline)
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bool needs_dc = false, needs_slm = false;
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bool needs_dc = false, needs_slm = false;
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for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
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for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
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if (!anv_pipeline_has_stage(pipeline, i))
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continue;
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const struct brw_stage_prog_data *prog_data = pipeline->prog_data[i];
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const struct brw_stage_prog_data *prog_data = pipeline->prog_data[i];
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needs_dc |= pipeline->needs_data_cache;
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needs_dc |= pipeline->needs_data_cache;
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needs_slm |= prog_data && prog_data->total_shared;
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needs_slm |= prog_data->total_shared;
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}
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}
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return get_default_l3_weights(&pipeline->device->info,
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return get_default_l3_weights(&pipeline->device->info,
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@ -668,11 +668,15 @@ emit_cb_state(struct anv_pipeline *pipeline,
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blend_state.Entry[i].WriteDisableBlue = true;
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blend_state.Entry[i].WriteDisableBlue = true;
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}
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}
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struct anv_pipeline_bind_map *map =
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uint32_t surface_count = 0;
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&pipeline->bindings[MESA_SHADER_FRAGMENT];
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struct anv_pipeline_bind_map *map;
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if (anv_pipeline_has_stage(pipeline, MESA_SHADER_FRAGMENT)) {
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map = &pipeline->bindings[MESA_SHADER_FRAGMENT];
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surface_count = map->surface_count;
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}
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bool has_writeable_rt = false;
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bool has_writeable_rt = false;
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for (unsigned i = 0; i < map->surface_count; i++) {
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for (unsigned i = 0; i < surface_count; i++) {
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struct anv_pipeline_binding *binding = &map->surface_to_descriptor[i];
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struct anv_pipeline_binding *binding = &map->surface_to_descriptor[i];
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/* All color attachments are at the beginning of the binding table */
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/* All color attachments are at the beginning of the binding table */
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