radeonsi: inline si_pm4_alloc_state

It seemed like the function needed a context pointer. Let's remove it
to make it less confusing.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
This commit is contained in:
Marek Olšák 2014-10-14 17:31:00 +02:00
parent 22c5886f3f
commit 139bde061a
4 changed files with 17 additions and 23 deletions

View File

@ -120,11 +120,6 @@ void si_pm4_free_state(struct si_context *sctx,
FREE(state);
}
struct si_pm4_state * si_pm4_alloc_state(struct si_context *sctx)
{
return CALLOC_STRUCT(si_pm4_state);
}
unsigned si_pm4_dirty_dw(struct si_context *sctx)
{
unsigned count = 0;

View File

@ -74,7 +74,6 @@ void si_pm4_add_bo(struct si_pm4_state *state,
void si_pm4_free_state(struct si_context *sctx,
struct si_pm4_state *state,
unsigned idx);
struct si_pm4_state * si_pm4_alloc_state(struct si_context *sctx);
unsigned si_pm4_dirty_dw(struct si_context *sctx);
void si_pm4_emit(struct si_context *sctx, struct si_pm4_state *state);

View File

@ -225,7 +225,7 @@ static void si_update_fb_blend_state(struct si_context *sctx)
if (blend == NULL)
return;
pm4 = si_pm4_alloc_state(sctx);
pm4 = CALLOC_STRUCT(si_pm4_state);
if (pm4 == NULL)
return;
@ -406,7 +406,7 @@ static void si_set_blend_color(struct pipe_context *ctx,
const struct pipe_blend_color *state)
{
struct si_context *sctx = (struct si_context *)ctx;
struct si_pm4_state *pm4 = si_pm4_alloc_state(sctx);
struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
if (pm4 == NULL)
return;
@ -427,7 +427,7 @@ static void si_set_clip_state(struct pipe_context *ctx,
const struct pipe_clip_state *state)
{
struct si_context *sctx = (struct si_context *)ctx;
struct si_pm4_state *pm4 = si_pm4_alloc_state(sctx);
struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
struct pipe_constant_buffer cb;
if (pm4 == NULL)
@ -530,7 +530,7 @@ static void si_update_fb_rs_state(struct si_context *sctx)
return;
}
pm4 = si_pm4_alloc_state(sctx);
pm4 = CALLOC_STRUCT(si_pm4_state);
if (pm4 == NULL)
return;
@ -696,7 +696,7 @@ static void si_delete_rs_state(struct pipe_context *ctx, void *state)
*/
static void si_update_dsa_stencil_ref(struct si_context *sctx)
{
struct si_pm4_state *pm4 = si_pm4_alloc_state(sctx);
struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
struct pipe_stencil_ref *ref = &sctx->stencil_ref;
struct si_state_dsa *dsa = sctx->queued.named.dsa;
@ -2834,7 +2834,7 @@ static void si_set_border_colors(struct si_context *sctx, unsigned count,
}
if (border_color_table) {
struct si_pm4_state *pm4 = si_pm4_alloc_state(sctx);
struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
uint64_t va_offset = sctx->border_color_table->gpu_address;
@ -3081,7 +3081,7 @@ void si_init_state_functions(struct si_context *sctx)
void si_init_config(struct si_context *sctx)
{
struct si_pm4_state *pm4 = si_pm4_alloc_state(sctx);
struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
if (pm4 == NULL)
return;

View File

@ -48,7 +48,7 @@ static void si_shader_es(struct pipe_context *ctx, struct si_shader *shader)
uint64_t va;
si_pm4_delete_state(sctx, es, shader->pm4);
pm4 = shader->pm4 = si_pm4_alloc_state(sctx);
pm4 = shader->pm4 = CALLOC_STRUCT(si_pm4_state);
if (pm4 == NULL)
return;
@ -92,7 +92,7 @@ static void si_shader_gs(struct pipe_context *ctx, struct si_shader *shader)
assert(gsvs_itemsize < (1 << 15));
si_pm4_delete_state(sctx, gs, shader->pm4);
pm4 = shader->pm4 = si_pm4_alloc_state(sctx);
pm4 = shader->pm4 = CALLOC_STRUCT(si_pm4_state);
if (pm4 == NULL)
return;
@ -157,7 +157,7 @@ static void si_shader_vs(struct pipe_context *ctx, struct si_shader *shader)
uint64_t va;
si_pm4_delete_state(sctx, vs, shader->pm4);
pm4 = shader->pm4 = si_pm4_alloc_state(sctx);
pm4 = shader->pm4 = CALLOC_STRUCT(si_pm4_state);
if (pm4 == NULL)
return;
@ -237,7 +237,7 @@ static void si_shader_ps(struct pipe_context *ctx, struct si_shader *shader)
uint64_t va;
si_pm4_delete_state(sctx, ps, shader->pm4);
pm4 = shader->pm4 = si_pm4_alloc_state(sctx);
pm4 = shader->pm4 = CALLOC_STRUCT(si_pm4_state);
if (pm4 == NULL)
return;
@ -421,7 +421,7 @@ static bool si_update_draw_info_state(struct si_context *sctx,
const struct pipe_draw_info *info,
const struct pipe_index_buffer *ib)
{
struct si_pm4_state *pm4 = si_pm4_alloc_state(sctx);
struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
struct si_shader *vs = si_get_vs_state(sctx);
unsigned prim = si_conv_pipe_prim(info->mode);
unsigned gs_out_prim =
@ -495,7 +495,7 @@ static void si_update_spi_map(struct si_context *sctx)
struct si_shader *vs = si_get_vs_state(sctx);
struct tgsi_shader_info *psinfo = &ps->selector->info;
struct tgsi_shader_info *vsinfo = &vs->selector->info;
struct si_pm4_state *pm4 = si_pm4_alloc_state(sctx);
struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
unsigned i, j, tmp;
for (i = 0; i < psinfo->num_inputs; i++) {
@ -557,7 +557,7 @@ static void si_init_gs_rings(struct si_context *sctx)
unsigned gsvs_ring_size = 64 * 1024 * 1024;
assert(!sctx->gs_rings);
sctx->gs_rings = si_pm4_alloc_state(sctx);
sctx->gs_rings = CALLOC_STRUCT(si_pm4_state);
sctx->esgs_ring = pipe_buffer_create(sctx->b.b.screen, PIPE_BIND_CUSTOM,
PIPE_USAGE_DEFAULT, esgs_ring_size);
@ -637,7 +637,7 @@ static void si_update_derived_state(struct si_context *sctx)
64, true, true, 4, 16);
if (!sctx->gs_on) {
sctx->gs_on = si_pm4_alloc_state(sctx);
sctx->gs_on = CALLOC_STRUCT(si_pm4_state);
si_pm4_set_reg(sctx->gs_on, R_028B54_VGT_SHADER_STAGES_EN,
S_028B54_ES_EN(V_028B54_ES_STAGE_REAL) |
@ -656,7 +656,7 @@ static void si_update_derived_state(struct si_context *sctx)
sctx->b.streamout.stride_in_dw = sctx->vs_shader->so.stride;
if (!sctx->gs_off) {
sctx->gs_off = si_pm4_alloc_state(sctx);
sctx->gs_off = CALLOC_STRUCT(si_pm4_state);
si_pm4_set_reg(sctx->gs_off, R_028A40_VGT_GS_MODE, 0);
si_pm4_set_reg(sctx->gs_off, R_028B54_VGT_SHADER_STAGES_EN, 0);
@ -705,7 +705,7 @@ static void si_state_draw(struct si_context *sctx,
{
unsigned sh_base_reg = (sctx->gs_shader ? R_00B330_SPI_SHADER_USER_DATA_ES_0 :
R_00B130_SPI_SHADER_USER_DATA_VS_0);
struct si_pm4_state *pm4 = si_pm4_alloc_state(sctx);
struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
if (pm4 == NULL)
return;