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anv/pipeline/gen8: Unconditionally set DXMultisampleRasterizaitonEnable 

The multisample rasterization mode is computed based on this field,
3DSTATE_RASTER::DXMultisampleRasterizationMode (only for forced
multisampling), 3DSTATE_RASTER::APIMode, and the number of samples.  There
are two tables in the SKL PRM that describe how the final multisample mode
is calculated: "Windower (WM) Stage >> Multisampling >> Multisample
ModeState >> Table 1" and the formula for "SF_INT::Multisample
Rasterization Mode".

The "DX Multisample Rasterization Enable" bit changes whether multisample
mode is set to OFF_PIXEL or ON_PATTERN in the samples > 1 case.  In the
samples == 1 case, the bit has no effect.  Since Vulkan has no concept of
disabling multisampling for samples > 1, we can just set the bit.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Jason Ekstrand 2016-08-06 08:42:51 -07:00
parent 1df511b6f0
commit 12e653adec
1 changed files with 2 additions and 9 deletions
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11
src/intel/vulkan/gen8_pipeline.c
View File

@ -47,14 +47,8 @@ emit_ia_state(struct anv_pipeline *pipeline,
static void
emit_rs_state(struct anv_pipeline *pipeline,
const VkPipelineRasterizationStateCreateInfo *info,
const VkPipelineMultisampleStateCreateInfo *ms_info,
const struct anv_graphics_pipeline_create_info *extra)
{
uint32_t samples = 1;
if (ms_info)
samples = ms_info->rasterizationSamples;
struct GENX(3DSTATE_SF) sf = {
GENX(3DSTATE_SF_header),
};
@ -75,7 +69,7 @@ emit_rs_state(struct anv_pipeline *pipeline,
/* For details on 3DSTATE_RASTER multisample state, see the BSpec table
* "Multisample Modes State".
*/
raster.DXMultisampleRasterizationEnable = samples > 1;
raster.DXMultisampleRasterizationEnable = true;
raster.ForcedSampleCount = FSC_NUMRASTSAMPLES_0;
raster.ForceMultisampling = false;
@ -173,8 +167,7 @@ genX(graphics_pipeline_create)(
assert(pCreateInfo->pInputAssemblyState);
emit_ia_state(pipeline, pCreateInfo->pInputAssemblyState, extra);
assert(pCreateInfo->pRasterizationState);
emit_rs_state(pipeline, pCreateInfo->pRasterizationState,
pCreateInfo->pMultisampleState, extra);
emit_rs_state(pipeline, pCreateInfo->pRasterizationState, extra);
emit_ms_state(pipeline, pCreateInfo->pMultisampleState);
emit_ds_state(pipeline, pCreateInfo->pDepthStencilState, pass, subpass);
emit_cb_state(pipeline, pCreateInfo->pColorBlendState,