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radeon/llvm: Use correct float->int conversion opcode on SI. 

V_CVT_I32_F32 converts floats to signed integers, but we were using
V_CVT_F32_I32 which convertes signed integers to float.
This commit is contained in:
Tom Stellard 2012-09-05 11:28:31 -04:00
parent d68e337c60
commit 12d3d6f6ab
1 changed files with 4 additions and 2 deletions
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6
src/gallium/drivers/radeon/SIInstructions.td
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@ -503,11 +503,13 @@ defm V_READFIRSTLANE_B32 : VOP1_32 <0x00000002, "V_READFIRSTLANE_B32", []>;
//defm V_CVT_I32_F64 : VOP1_32 <0x00000003, "V_CVT_I32_F64", []>;
//defm V_CVT_F64_I32 : VOP1_64 <0x00000004, "V_CVT_F64_I32", []>;
defm V_CVT_F32_I32 : VOP1_32 <0x00000005, "V_CVT_F32_I32",
[(set VReg_32:$dst, (fp_to_sint AllReg_32:$src0))]
[(set VReg_32:$dst, (sint_to_fp AllReg_32:$src0))]
>;
//defm V_CVT_F32_U32 : VOP1_32 <0x00000006, "V_CVT_F32_U32", []>;
//defm V_CVT_U32_F32 : VOP1_32 <0x00000007, "V_CVT_U32_F32", []>;
//defm V_CVT_I32_F32 : VOP1_32 <0x00000008, "V_CVT_I32_F32", []>;
defm V_CVT_I32_F32 : VOP1_32 <0x00000008, "V_CVT_I32_F32",
[(set VReg_32:$dst, (fp_to_sint AllReg_32:$src0))]
>;
defm V_MOV_FED_B32 : VOP1_32 <0x00000009, "V_MOV_FED_B32", []>;
////def V_CVT_F16_F32 : VOP1_F16 <0x0000000a, "V_CVT_F16_F32", []>;
//defm V_CVT_F32_F16 : VOP1_32 <0x0000000b, "V_CVT_F32_F16", []>;