nir: Add a bool to int32 lowering pass
We also enable it in all of the NIR drivers. Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Tested-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
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191a1dce92
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11dc130779
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@ -2087,6 +2087,10 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
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radv_link_shaders(pipeline, nir);
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for (int i = 0; i < MESA_SHADER_STAGES; ++i) {
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if (nir[i]) {
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NIR_PASS_V(nir[i], nir_lower_bool_to_int32);
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}
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if (radv_can_dump_shader(device, modules[i], false))
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nir_print_shader(nir[i], stderr);
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}
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@ -756,6 +756,7 @@ uint64_t *v3d_compile_vs(const struct v3d_compiler *compiler,
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v3d_lower_nir_late(c);
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v3d_optimize_nir(c->s);
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NIR_PASS_V(c->s, nir_lower_bool_to_int32);
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NIR_PASS_V(c->s, nir_convert_from_ssa, true);
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v3d_nir_to_vir(c);
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@ -907,6 +908,7 @@ uint64_t *v3d_compile_fs(const struct v3d_compiler *compiler,
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v3d_lower_nir_late(c);
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v3d_optimize_nir(c->s);
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NIR_PASS_V(c->s, nir_lower_bool_to_int32);
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NIR_PASS_V(c->s, nir_convert_from_ssa, true);
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v3d_nir_to_vir(c);
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@ -231,6 +231,7 @@ NIR_FILES = \
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nir/nir_lower_atomics_to_ssbo.c \
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nir/nir_lower_bitmap.c \
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nir/nir_lower_bit_size.c \
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nir/nir_lower_bool_to_int32.c \
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nir/nir_lower_clamp_color_outputs.c \
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nir/nir_lower_clip.c \
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nir/nir_lower_clip_cull_distance_arrays.c \
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@ -114,6 +114,7 @@ files_libnir = files(
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'nir_lower_alpha_test.c',
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'nir_lower_atomics_to_ssbo.c',
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'nir_lower_bitmap.c',
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'nir_lower_bool_to_int32.c',
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'nir_lower_clamp_color_outputs.c',
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'nir_lower_clip.c',
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'nir_lower_clip_cull_distance_arrays.c',
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@ -2905,6 +2905,7 @@ void nir_lower_alpha_test(nir_shader *shader, enum compare_func func,
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bool alpha_to_one);
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bool nir_lower_alu(nir_shader *shader);
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bool nir_lower_alu_to_scalar(nir_shader *shader);
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bool nir_lower_bool_to_int32(nir_shader *shader);
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bool nir_lower_load_const_to_scalar(nir_shader *shader);
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bool nir_lower_read_invocation_to_scalar(nir_shader *shader);
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bool nir_lower_phis_to_scalar(nir_shader *shader);
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@ -0,0 +1,160 @@
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/*
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* Copyright © 2018 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "nir.h"
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static bool
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assert_ssa_def_is_not_1bit(nir_ssa_def *def, UNUSED void *unused)
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{
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assert(def->bit_size > 1);
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return true;
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}
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static bool
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rewrite_1bit_ssa_def_to_32bit(nir_ssa_def *def, void *_progress)
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{
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bool *progress = _progress;
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if (def->bit_size == 1) {
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def->bit_size = 32;
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*progress = true;
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}
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return true;
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}
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static bool
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lower_alu_instr(nir_alu_instr *alu)
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{
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const nir_op_info *op_info = &nir_op_infos[alu->op];
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switch (alu->op) {
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case nir_op_imov:
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case nir_op_vec2:
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case nir_op_vec3:
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case nir_op_vec4:
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case nir_op_inot:
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case nir_op_iand:
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case nir_op_ior:
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case nir_op_ixor:
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/* These we expect to have booleans but the opcode doesn't change */
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break;
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case nir_op_f2b1: alu->op = nir_op_f2b32; break;
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case nir_op_i2b1: alu->op = nir_op_i2b32; break;
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case nir_op_flt: alu->op = nir_op_flt32; break;
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case nir_op_fge: alu->op = nir_op_fge32; break;
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case nir_op_feq: alu->op = nir_op_feq32; break;
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case nir_op_fne: alu->op = nir_op_fne32; break;
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case nir_op_ilt: alu->op = nir_op_ilt32; break;
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case nir_op_ige: alu->op = nir_op_ige32; break;
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case nir_op_ieq: alu->op = nir_op_ieq32; break;
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case nir_op_ine: alu->op = nir_op_ine32; break;
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case nir_op_ult: alu->op = nir_op_ult32; break;
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case nir_op_uge: alu->op = nir_op_uge32; break;
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case nir_op_ball_fequal2: alu->op = nir_op_b32all_fequal2; break;
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case nir_op_ball_fequal3: alu->op = nir_op_b32all_fequal3; break;
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case nir_op_ball_fequal4: alu->op = nir_op_b32all_fequal4; break;
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case nir_op_bany_fnequal2: alu->op = nir_op_b32any_fnequal2; break;
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case nir_op_bany_fnequal3: alu->op = nir_op_b32any_fnequal3; break;
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case nir_op_bany_fnequal4: alu->op = nir_op_b32any_fnequal4; break;
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case nir_op_ball_iequal2: alu->op = nir_op_b32all_iequal2; break;
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case nir_op_ball_iequal3: alu->op = nir_op_b32all_iequal3; break;
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case nir_op_ball_iequal4: alu->op = nir_op_b32all_iequal4; break;
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case nir_op_bany_inequal2: alu->op = nir_op_b32any_inequal2; break;
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case nir_op_bany_inequal3: alu->op = nir_op_b32any_inequal3; break;
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case nir_op_bany_inequal4: alu->op = nir_op_b32any_inequal4; break;
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case nir_op_bcsel: alu->op = nir_op_b32csel; break;
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default:
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assert(alu->dest.dest.ssa.bit_size > 1);
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for (unsigned i = 0; i < op_info->num_inputs; i++)
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assert(alu->src[i].src.ssa->bit_size > 1);
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return false;
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}
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if (alu->dest.dest.ssa.bit_size == 1)
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alu->dest.dest.ssa.bit_size = 32;
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return true;
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}
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static bool
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nir_lower_bool_to_int32_impl(nir_function_impl *impl)
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{
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bool progress = false;
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nir_foreach_block(block, impl) {
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nir_foreach_instr_safe(instr, block) {
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switch (instr->type) {
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case nir_instr_type_alu:
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progress |= lower_alu_instr(nir_instr_as_alu(instr));
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break;
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case nir_instr_type_load_const: {
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nir_load_const_instr *load = nir_instr_as_load_const(instr);
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if (load->def.bit_size == 1) {
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nir_const_value value = load->value;
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for (unsigned i = 0; i < load->def.num_components; i++)
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load->value.u32[i] = value.b[i] ? NIR_TRUE : NIR_FALSE;
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load->def.bit_size = 32;
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progress = true;
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}
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break;
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}
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case nir_instr_type_intrinsic:
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case nir_instr_type_ssa_undef:
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case nir_instr_type_phi:
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case nir_instr_type_tex:
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nir_foreach_ssa_def(instr, rewrite_1bit_ssa_def_to_32bit,
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&progress);
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break;
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default:
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nir_foreach_ssa_def(instr, assert_ssa_def_is_not_1bit, NULL);
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}
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}
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}
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if (progress) {
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nir_metadata_preserve(impl, nir_metadata_block_index |
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nir_metadata_dominance);
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}
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return progress;
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}
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bool
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nir_lower_bool_to_int32(nir_shader *shader)
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{
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bool progress = false;
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nir_foreach_function(function, shader) {
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if (function->impl && nir_lower_bool_to_int32_impl(function->impl))
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progress = true;
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}
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return progress;
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}
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@ -77,6 +77,7 @@ ir3_context_init(struct ir3_compiler *compiler,
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/* this needs to be the last pass run, so do this here instead of
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* in ir3_optimize_nir():
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*/
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NIR_PASS_V(ctx->s, nir_lower_bool_to_int32);
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NIR_PASS_V(ctx->s, nir_lower_locals_to_regs);
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NIR_PASS_V(ctx->s, nir_convert_from_ssa, true);
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@ -853,6 +853,8 @@ si_lower_nir(struct si_shader_selector* sel)
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NIR_PASS(progress, sel->nir, nir_opt_loop_unroll, 0);
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}
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} while (progress);
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NIR_PASS_V(sel->nir, nir_lower_bool_to_int32);
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}
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static void declare_nir_input_vs(struct si_shader_context *ctx,
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@ -2385,6 +2385,8 @@ vc4_shader_ntq(struct vc4_context *vc4, enum qstage stage,
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vc4_optimize_nir(c->s);
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NIR_PASS_V(c->s, nir_lower_bool_to_int32);
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NIR_PASS_V(c->s, nir_convert_from_ssa, true);
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if (vc4_debug & VC4_DEBUG_SHADERDB) {
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@ -822,6 +822,8 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
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nir_print_shader(nir, stderr);
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}
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OPT(nir_lower_bool_to_int32);
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OPT(nir_convert_from_ssa, true);
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if (!is_scalar) {
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