r600g: fix tgsi_op2_s with trans-only instructions
This fixes the issue when dst and src is the same reg and operation on one channel overwrites the source for other channels, e.g.: UMUL TEMP[2].xyz, TEMP[0].xyzz, TEMP[2].xxxx In this example the result of the operation on channel x is written in TEMP[2].x and then used as a second source operand for channels y and z instead of original value in TEMP[2].x. This patch stores the results in temp reg and moves them to dst after performing operation on all channels. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=70327 Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
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@ -1638,14 +1638,21 @@ static int tgsi_op2_s(struct r600_shader_ctx *ctx, int swap, int trans_only)
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{
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{
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struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
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struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
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struct r600_bytecode_alu alu;
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struct r600_bytecode_alu alu;
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int i, j, r;
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unsigned write_mask = inst->Dst[0].Register.WriteMask;
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int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
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int i, j, r, lasti = tgsi_last_instruction(write_mask);
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/* use temp register if trans_only and more than one dst component */
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int use_tmp = trans_only && (write_mask ^ (1 << lasti));
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for (i = 0; i < lasti + 1; i++) {
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for (i = 0; i <= lasti; i++) {
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if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
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if (!(write_mask & (1 << i)))
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continue;
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continue;
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memset(&alu, 0, sizeof(struct r600_bytecode_alu));
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memset(&alu, 0, sizeof(struct r600_bytecode_alu));
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if (use_tmp) {
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alu.dst.sel = ctx->temp_reg;
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alu.dst.chan = i;
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alu.dst.write = 1;
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} else
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tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
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tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
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alu.op = ctx->inst_info->op;
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alu.op = ctx->inst_info->op;
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@ -1675,6 +1682,25 @@ static int tgsi_op2_s(struct r600_shader_ctx *ctx, int swap, int trans_only)
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if (r)
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if (r)
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return r;
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return r;
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}
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}
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if (use_tmp) {
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/* move result from temp to dst */
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for (i = 0; i <= lasti; i++) {
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if (!(write_mask & (1 << i)))
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continue;
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memset(&alu, 0, sizeof(struct r600_bytecode_alu));
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alu.op = ALU_OP1_MOV;
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tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
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alu.src[0].sel = ctx->temp_reg;
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alu.src[0].chan = i;
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alu.last = (i == lasti);
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r = r600_bytecode_add_alu(ctx->bc, &alu);
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if (r)
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return r;
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}
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}
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return 0;
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return 0;
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}
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}
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