From 10734fb7482ac10d7085eff5184467fe93354564 Mon Sep 17 00:00:00 2001 From: Danylo Piliaiev Date: Thu, 24 Mar 2022 11:49:50 +0200 Subject: [PATCH] turnip: enable has_ccu_flush_bug workaround for a660 It seems that a660 has the same bug. Without the workaround there are a lot of flakes with depth-stencil tests, e.g. in: dEQP-VK.pipeline.extended_dynamic_state.* dEQP-VK.renderpass.depth_stencil_write_conditions.* dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.* Or guaranteed failures like of: dEQP-VK.pipeline.render_to_image.core.2d.huge.width.r8g8b8a8_unorm_d32_sfloat_s8_uint Enabling the workaround fixes all of them. cc: mesa-stable Signed-off-by: Danylo Piliaiev Part-of: --- src/freedreno/common/freedreno_devices.py | 1 + 1 file changed, 1 insertion(+) diff --git a/src/freedreno/common/freedreno_devices.py b/src/freedreno/common/freedreno_devices.py index 647250bafc5..aecc477a706 100644 --- a/src/freedreno/common/freedreno_devices.py +++ b/src/freedreno/common/freedreno_devices.py @@ -263,6 +263,7 @@ a6xx_gen4 = dict( storage_16bit = True, has_tex_filter_cubic = True, has_sample_locations = True, + has_ccu_flush_bug = True, has_cp_reg_write = False, has_8bpp_ubwc = False, has_lpac = True,