iris: Minor tidying

This commit is contained in:
Kenneth Graunke 2019-07-03 15:12:17 -07:00
parent 6ab23805c3
commit 10560f8506
8 changed files with 5 additions and 62 deletions

View File

@ -679,10 +679,7 @@ _iris_batch_flush(struct iris_batch *batch, const char *file, int line)
ret = 0;
}
if (ret >= 0) {
//if (iris->ctx.Const.ResetStrategy == GL_LOSE_CONTEXT_ON_RESET_ARB)
//iris_check_for_reset(ice);
} else {
if (ret < 0) {
#ifdef DEBUG
const bool color = INTEL_DEBUG & DEBUG_COLOR;
fprintf(stderr, "%siris: Failed to submit batchbuffer: %-80s%s\n",

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@ -307,18 +307,8 @@ iris_blorp_exec(struct blorp_batch *blorp_batch,
iris_require_command_space(batch, 1400);
// XXX: Emit L3 state
#if GEN_GEN == 8
// XXX: PMA - gen8_write_pma_stall_bits(ice, 0);
#endif
// XXX: TODO...drawing rectangle...unrevert Jason's patches on master
blorp_exec(blorp_batch, params);
// XXX: aperture checks?
/* We've smashed all state compared to what the normal 3D pipeline
* rendering tracks for GL.
*/

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@ -688,8 +688,6 @@ struct iris_context {
struct iris_state_ref null_fb;
struct u_upload_mgr *surface_uploader;
// XXX: may want a separate uploader for "hey I made a CSO!" vs
// "I'm streaming this out at draw time and never want it again!"
struct u_upload_mgr *dynamic_uploader;
struct iris_binder binder;

View File

@ -406,8 +406,8 @@ iris_is_format_supported(struct pipe_screen *pscreen,
const struct gen_device_info *devinfo = &screen->devinfo;
uint32_t max_samples = devinfo->gen == 8 ? 8 : 16;
// XXX: msaa max
if (sample_count > max_samples || !util_is_power_of_two_or_zero(sample_count))
if (sample_count > max_samples ||
!util_is_power_of_two_or_zero(sample_count))
return false;
if (pformat == PIPE_FORMAT_NONE)
@ -470,7 +470,7 @@ iris_is_format_supported(struct pipe_screen *pscreen,
*/
supported &= sample_count <= 1;
// XXX: allow untyped reads
/* TODO: allow formats that only support untyped reads? */
supported &= isl_format_supports_typed_reads(devinfo, format) &&
isl_format_supports_typed_writes(devinfo, format);
}
@ -500,38 +500,6 @@ iris_is_format_supported(struct pipe_screen *pscreen,
format == ISL_FORMAT_R32_UINT;
}
if (usage & PIPE_BIND_CONSTANT_BUFFER) {
// XXX:
}
if (usage & PIPE_BIND_STREAM_OUTPUT) {
// XXX:
}
if (usage & PIPE_BIND_CURSOR) {
// XXX:
}
if (usage & PIPE_BIND_CUSTOM) {
// XXX:
}
if (usage & PIPE_BIND_SHADER_BUFFER) {
// XXX:
}
if (usage & PIPE_BIND_COMPUTE_RESOURCE) {
// XXX:
}
if (usage & PIPE_BIND_COMMAND_ARGS_BUFFER) {
// XXX:
}
if (usage & PIPE_BIND_QUERY_BUFFER) {
// XXX:
}
return supported;
}

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@ -78,7 +78,6 @@ iris_upload_ubo_ssbo_surf_state(struct iris_context *ice,
struct pipe_context *ctx = &ice->ctx;
struct iris_screen *screen = (struct iris_screen *) ctx->screen;
// XXX: these are not retained forever, use a separate uploader?
void *map =
upload_state(ice->state.surface_uploader, surf_state,
screen->isl_dev.ss.size, 64);
@ -1563,7 +1562,6 @@ update_last_vue_map(struct iris_context *ice,
(old_map ? old_map->slots_valid : 0ull) ^ vue_map->slots_valid;
if (changed_slots & VARYING_BIT_VIEWPORT) {
// XXX: could use ctx->Const.MaxViewports for old API efficiency
ice->state.num_viewports =
(vue_map->slots_valid & VARYING_BIT_VIEWPORT) ? IRIS_MAX_VIEWPORTS : 1;
ice->state.dirty |= IRIS_DIRTY_CLIP |
@ -1572,7 +1570,6 @@ update_last_vue_map(struct iris_context *ice,
IRIS_DIRTY_SCISSOR_RECT |
IRIS_DIRTY_UNCOMPILED_FS |
ice->state.dirty_for_nos[IRIS_NOS_LAST_VUE_MAP];
// XXX: CC_VIEWPORT?
}
if (changed_slots || (old_map && old_map->separate != vue_map->separate)) {

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@ -1276,7 +1276,6 @@ iris_map_tiled_memcpy(struct iris_transfer *map)
const bool has_swizzling = false;
// XXX: PIPE_TRANSFER_READ?
if (!(xfer->usage & PIPE_TRANSFER_DISCARD_RANGE)) {
char *src =
iris_bo_map(map->dbg, res->bo, (xfer->usage | MAP_RAW) & MAP_FLAGS);

View File

@ -246,7 +246,7 @@ iris_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
return 16; // XXX: u_screen says 256 is the minimum value...
case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
return true; // XXX: ?????
return true;
case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
return IRIS_MAX_TEXTURE_BUFFER_SIZE;
case PIPE_CAP_MAX_VIEWPORTS:

View File

@ -2083,7 +2083,6 @@ iris_set_shader_images(struct pipe_context *ctx,
const struct pipe_image_view *img = &p_images[i];
struct iris_resource *res = (void *) img->resource;
// XXX: these are not retained forever, use a separate uploader?
void *map =
alloc_surface_states(ice->state.surface_uploader,
&iv->surface_state, 1 << ISL_AUX_USAGE_NONE);
@ -3723,7 +3722,6 @@ iris_store_fs_state(struct iris_context *ice,
#else
psx.PixelShaderUsesInputCoverageMask = wm_prog_data->uses_sample_mask;
#endif
// XXX: UAV bit
}
}
@ -4051,7 +4049,6 @@ iris_populate_binding_table(struct iris_context *ice,
struct iris_shader_state *shs = &ice->state.shaders[stage];
uint32_t binder_addr = binder->bo->gtt_offset;
//struct brw_stage_prog_data *prog_data = (void *) shader->prog_data;
uint32_t *bt_map = binder->map + binder->bt_offset[stage];
int s = 0;
@ -5405,7 +5402,6 @@ iris_upload_render_state(struct iris_context *ice,
prim.InstanceCount = draw->instance_count;
prim.VertexCountPerInstance = draw->count;
// XXX: this is probably bonkers.
prim.StartVertexLocation = draw->start;
if (draw->index_size) {
@ -5413,8 +5409,6 @@ iris_upload_render_state(struct iris_context *ice,
} else {
prim.StartVertexLocation += draw->index_bias;
}
//prim.BaseVertexLocation = ...;
}
}
}