i965: Fix {src, dst}_pitch alignment check for XY_SRC_COPY_BLT
Current code checks the alignment restrictions only for Y tiling. From Broadwell PRM vol 10: "pitch is of 512Byte granularity for Tile-X: This means the tiled-x surface pitch can be (512, 1024, 1536, 2048...)/4 (in Dwords)." This patch adds the restriction for X tiling as well. Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Chad Versace <chad.versace@intel.com>
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@ -522,6 +522,8 @@ intelEmitCopyBlit(struct brw_context *brw,
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bool dst_y_tiled = dst_tiling == I915_TILING_Y;
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bool src_y_tiled = src_tiling == I915_TILING_Y;
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bool use_fast_copy_blit = false;
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uint32_t src_tile_w, src_tile_h;
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uint32_t dst_tile_w, dst_tile_h;
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if ((dst_y_tiled || src_y_tiled) && brw->gen < 6)
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return false;
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@ -550,6 +552,9 @@ intelEmitCopyBlit(struct brw_context *brw,
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src_buffer, src_pitch, src_offset, src_x, src_y,
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dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h);
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intel_get_tile_dims(src_tiling, src_tr_mode, cpp, &src_tile_w, &src_tile_h);
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intel_get_tile_dims(dst_tiling, dst_tr_mode, cpp, &dst_tile_w, &dst_tile_h);
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use_fast_copy_blit = can_fast_copy_blit(brw,
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src_buffer,
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src_x, src_y,
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@ -588,8 +593,8 @@ intelEmitCopyBlit(struct brw_context *brw,
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cpp, use_fast_copy_blit);
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} else {
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assert(!dst_y_tiled || (dst_pitch % 128) == 0);
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assert(!src_y_tiled || (src_pitch % 128) == 0);
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assert(src_tiling == I915_TILING_NONE || (src_pitch % src_tile_w) == 0);
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assert(dst_tiling == I915_TILING_NONE || (dst_pitch % dst_tile_w) == 0);
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/* For big formats (such as floating point), do the copy using 16 or
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* 32bpp and multiply the coordinates.
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