KonstantinSeurer
/
mesa
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

i965/blorp/gen6: Use normal base state address setup 

This is identical to the blorp version which only differs in case
fragment shader isn't used. In that case blorp would reset batch
buffer address to zero.
This is not really needed, and having blorp to use base state
address setup that is compatible with normal upload allows one to
skip resetting it.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Topi Pohjolainen 2016-04-22 16:01:12 +03:00
parent ae73e86497
commit 0e850452d1
3 changed files with 5 additions and 54 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/mesa/drivers/dri/i965/brw_blorp.h
View File

@ -405,10 +405,6 @@ private:
void
gen6_blorp_init(struct brw_context *brw);
void
gen6_blorp_emit_state_base_address(struct brw_context *brw,
const brw_blorp_params *params);
void
gen6_blorp_emit_vertices(struct brw_context *brw,
const brw_blorp_params *params);

51
src/mesa/drivers/dri/i965/gen6_blorp.cpp
View File

@ -31,54 +31,6 @@
#include "brw_blorp.h"
/**
* CMD_STATE_BASE_ADDRESS
*
* From the Sandy Bridge PRM, Volume 1, Part 1, Table STATE_BASE_ADDRESS:
* The following commands must be reissued following any change to the
* base addresses:
* 3DSTATE_CC_POINTERS
* 3DSTATE_BINDING_TABLE_POINTERS
* 3DSTATE_SAMPLER_STATE_POINTERS
* 3DSTATE_VIEWPORT_STATE_POINTERS
* MEDIA_STATE_POINTERS
*/
void
gen6_blorp_emit_state_base_address(struct brw_context *brw,
const brw_blorp_params *params)
{
uint8_t mocs = brw->gen == 7 ? GEN7_MOCS_L3 : 0;
BEGIN_BATCH(10);
OUT_BATCH(CMD_STATE_BASE_ADDRESS << 16 | (10 - 2));
OUT_BATCH(mocs << 8 | /* GeneralStateMemoryObjectControlState */
mocs << 4 | /* StatelessDataPortAccessMemoryObjectControlState */
1); /* GeneralStateBaseAddressModifyEnable */
/* SurfaceStateBaseAddress */
OUT_RELOC(brw->batch.bo, I915_GEM_DOMAIN_SAMPLER, 0, 1);
/* DynamicStateBaseAddress */
OUT_RELOC(brw->batch.bo, (I915_GEM_DOMAIN_RENDER |
I915_GEM_DOMAIN_INSTRUCTION), 0, 1);
OUT_BATCH(1); /* IndirectObjectBaseAddress */
if (params->use_wm_prog) {
OUT_RELOC(brw->cache.bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
1); /* Instruction base address: shader kernels */
} else {
OUT_BATCH(1); /* InstructionBaseAddress */
}
OUT_BATCH(1); /* GeneralStateUpperBound */
/* Dynamic state upper bound. Although the documentation says that
* programming it to zero will cause it to be ignored, that is a lie.
* If this isn't programmed to a real bound, the sampler border color
* pointer is rejected, causing border color to mysteriously fail.
*/
OUT_BATCH(0xfffff001);
OUT_BATCH(1); /* IndirectObjectUpperBound*/
OUT_BATCH(1); /* InstructionAccessUpperBound */
ADVANCE_BATCH();
}
static void
gen6_blorp_emit_vertex_buffer_state(struct brw_context *brw,
unsigned num_elems,
@ -1037,11 +989,12 @@ gen6_blorp_exec(struct brw_context *brw,
/* Emit workaround flushes when we switch from drawing to blorping. */
brw_emit_post_sync_nonzero_flush(brw);
brw_state_base_address.emit(brw);
gen6_emit_3dstate_multisample(brw, params->dst.num_samples);
gen6_emit_3dstate_sample_mask(brw,
params->dst.num_samples > 1 ?
(1 << params->dst.num_samples) - 1 : 1);
gen6_blorp_emit_state_base_address(brw, params);
gen6_blorp_emit_vertices(brw, params);
gen6_blorp_emit_urb_config(brw, params);
if (params->use_wm_prog) {

4
src/mesa/drivers/dri/i965/gen7_blorp.cpp
View File

@ -813,11 +813,13 @@ gen7_blorp_exec(struct brw_context *brw,
uint32_t wm_bind_bo_offset = 0;
uint32_t prog_offset = params->get_wm_prog(brw, &prog_data);
brw_state_base_address.emit(brw);
gen6_emit_3dstate_multisample(brw, params->dst.num_samples);
gen6_emit_3dstate_sample_mask(brw,
params->dst.num_samples > 1 ?
(1 << params->dst.num_samples) - 1 : 1);
gen6_blorp_emit_state_base_address(brw, params);
gen6_blorp_emit_vertices(brw, params);
gen7_blorp_emit_urb_config(brw);
if (params->use_wm_prog) {