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radeonsi: make sure LS-HS vector lanes are reasonably occupied 

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
This commit is contained in:
Marek Olšák 2018-06-05 02:09:52 -04:00
parent e93fe403bc
commit 0d685ba290
1 changed files with 8 additions and 0 deletions
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8
src/gallium/drivers/radeonsi/si_state_draw.c
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@ -170,6 +170,14 @@ static bool si_emit_derived_tess_state(struct si_context *sctx,
*/
*num_patches = MIN2(*num_patches, 40);
/* Make sure that vector lanes are reasonably occupied. It probably
* doesn't matter much because this is LS-HS, and TES is likely to
* occupy significantly more CUs.
*/
unsigned temp_verts_per_tg = *num_patches * max_verts_per_patch;
if (temp_verts_per_tg > 64 && temp_verts_per_tg % 64 < 48)
*num_patches = (temp_verts_per_tg & ~63) / max_verts_per_patch;
if (sctx->chip_class == SI) {
/* SI bug workaround, related to power management. Limit LS-HS
* threadgroups to only one wave.