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radv: disable DCC image stores on Navi12-14 for displayable DCC corruption 

DCC image stores require 128B but 64B is used for displayable DCC.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5265
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5106
Cc: 21.2 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12521>
This commit is contained in:
Samuel Pitoiset 2021-08-24 16:52:50 +02:00
parent a069b4e9b9
commit 0c550a5fe6
1 changed files with 15 additions and 2 deletions
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17
src/amd/vulkan/radv_image.c
View File

@ -231,7 +231,7 @@ radv_use_dcc_for_image(struct radv_device *device, struct radv_image *image,
* decompressing a lot anyway we might as well not have DCC.
*/
if ((pCreateInfo->usage & VK_IMAGE_USAGE_STORAGE_BIT) &&
(!radv_image_use_dcc_image_stores(device, image) ||
(device->physical_device->rad_info.chip_class < GFX10 ||
radv_formats_is_atomic_allowed(pCreateInfo->pNext, format, pCreateInfo->flags)))
return false;
@ -281,7 +281,20 @@ radv_use_dcc_for_image(struct radv_device *device, struct radv_image *image,
bool
radv_image_use_dcc_image_stores(const struct radv_device *device, const struct radv_image *image)
{
return device->physical_device->rad_info.chip_class >= GFX10;
/* DCC image stores is only available for GFX10+. */
if (device->physical_device->rad_info.chip_class < GFX10)
return false;
if ((device->physical_device->rad_info.family == CHIP_NAVI12 ||
device->physical_device->rad_info.family == CHIP_NAVI14) &&
!image->planes[0].surface.u.gfx9.color.dcc.independent_128B_blocks) {
/* Do not enable DCC image stores because INDEPENDENT_128B_BLOCKS is required, and 64B is used
* for displayable DCC on NAVI12-14.
*/
return false;
}
return true;
}
/*