svga: remove pre-SVGA3D_HWVERSION_WS8_B1 code
3D wasn't officially supported before virtual HW version 8 so we can remove this old code. Reviewed-by: Charmaine Lee <charmainel@vmware.com> Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
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@ -264,50 +264,6 @@ svga_get_extra_gs_constants(struct svga_context *svga, float *dest)
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return count;
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}
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/**
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* Check and emit one shader constant register.
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* \param shader PIPE_SHADER_FRAGMENT or PIPE_SHADER_VERTEX
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* \param i which float[4] constant to change
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* \param value the new float[4] value
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*/
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static enum pipe_error
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emit_const(struct svga_context *svga, enum pipe_shader_type shader, unsigned i,
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const float *value)
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{
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enum pipe_error ret = PIPE_OK;
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assert(shader < PIPE_SHADER_TYPES);
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assert(i < SVGA3D_CONSTREG_MAX);
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assert(!svga_have_vgpu10(svga));
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if (memcmp(svga->state.hw_draw.cb[shader][i], value,
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4 * sizeof(float)) != 0) {
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if (SVGA_DEBUG & DEBUG_CONSTS)
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debug_printf("%s %s %u: %f %f %f %f\n",
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__FUNCTION__,
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shader == PIPE_SHADER_VERTEX ? "VERT" : "FRAG",
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i,
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value[0],
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value[1],
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value[2],
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value[3]);
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ret = SVGA3D_SetShaderConst( svga->swc,
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i,
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svga_shader_type(shader),
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SVGA3D_CONST_TYPE_FLOAT,
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value );
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if (ret != PIPE_OK)
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return ret;
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memcpy(svga->state.hw_draw.cb[shader][i], value, 4 * sizeof(float));
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svga->hud.num_const_updates++;
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}
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return ret;
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}
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/*
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* Check and emit a range of shader constant registers, trying to coalesce
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@ -442,11 +398,9 @@ static enum pipe_error
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emit_consts_vgpu9(struct svga_context *svga, enum pipe_shader_type shader)
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{
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const struct pipe_constant_buffer *cbuf;
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struct svga_screen *ss = svga_screen(svga->pipe.screen);
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struct pipe_transfer *transfer = NULL;
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unsigned count;
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const float (*data)[4] = NULL;
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unsigned i;
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enum pipe_error ret = PIPE_OK;
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const unsigned offset = 0;
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@ -469,24 +423,13 @@ emit_consts_vgpu9(struct svga_context *svga, enum pipe_shader_type shader)
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}
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/* sanity check */
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assert(cbuf->buffer->width0 >=
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cbuf->buffer_size);
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assert(cbuf->buffer->width0 >= cbuf->buffer_size);
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/* Use/apply the constant buffer size and offsets here */
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count = cbuf->buffer_size / (4 * sizeof(float));
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data += cbuf->buffer_offset / (4 * sizeof(float));
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if (ss->hw_version >= SVGA3D_HWVERSION_WS8_B1) {
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ret = emit_const_range( svga, shader, offset, count, data );
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}
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else {
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for (i = 0; i < count; i++) {
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ret = emit_const( svga, shader, offset + i, data[i] );
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if (ret != PIPE_OK) {
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break;
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}
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}
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}
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ret = emit_const_range( svga, shader, offset, count, data );
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pipe_buffer_unmap(&svga->pipe, transfer);
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@ -500,7 +443,7 @@ emit_consts_vgpu9(struct svga_context *svga, enum pipe_shader_type shader)
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const struct svga_shader_variant *variant = NULL;
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unsigned offset;
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float extras[MAX_EXTRA_CONSTS][4];
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unsigned count, i;
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unsigned count;
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switch (shader) {
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case PIPE_SHADER_VERTEX:
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@ -521,17 +464,8 @@ emit_consts_vgpu9(struct svga_context *svga, enum pipe_shader_type shader)
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assert(count <= ARRAY_SIZE(extras));
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if (count > 0) {
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if (ss->hw_version >= SVGA3D_HWVERSION_WS8_B1) {
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ret = emit_const_range(svga, shader, offset, count,
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(const float (*) [4])extras);
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}
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else {
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for (i = 0; i < count; i++) {
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ret = emit_const(svga, shader, offset + i, extras[i]);
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if (ret != PIPE_OK)
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return ret;
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}
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}
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ret = emit_const_range(svga, shader, offset, count,
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(const float (*) [4])extras);
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}
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}
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