pan/bi: Extend LD_TILE with a register format
Required for Valhall. NIR has the information anyway, pass it along. Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15216>
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@ -6377,6 +6377,12 @@
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<opt>v3</opt>
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<opt>v4</opt>
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</mod>
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<mod name="register_format" size="3" pseudo="true">
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<opt>f32</opt>
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<opt>f16</opt>
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<opt>u32</opt>
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<opt>s32</opt>
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</mod>
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</ins>
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<ins name="+LD_VAR" staging="w=vecsize" message="varying">
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@ -1139,6 +1139,8 @@ bi_emit_load_frag_coord(bi_builder *b, nir_intrinsic_instr *instr)
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static void
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bi_emit_ld_tile(bi_builder *b, nir_intrinsic_instr *instr)
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{
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nir_alu_type T = nir_intrinsic_dest_type(instr);
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enum bi_register_format regfmt = bi_reg_fmt_for_nir(T);
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unsigned rt = b->shader->inputs->blend.rt;
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unsigned size = nir_dest_bit_size(instr->dest);
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@ -1159,7 +1161,8 @@ bi_emit_ld_tile(bi_builder *b, nir_intrinsic_instr *instr)
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bi_load_sysval(b, PAN_SYSVAL(RT_CONVERSION, rt | (size << 4)), 1, 0);
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bi_ld_tile_to(b, bi_dest_index(&instr->dest), bi_pixel_indices(b, rt),
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bi_register(60), desc, (instr->num_components - 1));
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bi_register(60), desc, regfmt,
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(instr->num_components - 1));
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}
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static void
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