asahi: Move fixed internal shaders to agx_blit.c
A more natural place to put them, as the clear/store shaders use a similar mechanism as the reload shaders. Now magic.c is exclusively kernel side piping. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
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@ -28,7 +28,7 @@
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#include "asahi/compiler/agx_compile.h"
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#include "asahi/compiler/agx_compile.h"
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#include "gallium/auxiliary/util/u_blitter.h"
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#include "gallium/auxiliary/util/u_blitter.h"
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void
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static void
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agx_build_reload_shader(struct agx_device *dev)
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agx_build_reload_shader(struct agx_device *dev)
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{
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{
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nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_FRAGMENT,
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nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_FRAGMENT,
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@ -132,3 +132,51 @@ agx_blit(struct pipe_context *pipe,
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agx_blitter_save(ctx, ctx->blitter, info->render_condition_enable);
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agx_blitter_save(ctx, ctx->blitter, info->render_condition_enable);
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util_blitter_blit(ctx->blitter, info);
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util_blitter_blit(ctx->blitter, info);
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}
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}
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/* We need some fixed shaders for common rendering tasks. When colour buffer
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* reload is not in use, a shader is used to clear a particular colour. At the
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* end of rendering a tile, a shader is used to write it out. These shaders are
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* too trivial to go through the compiler at this stage. */
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#define AGX_STOP \
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0x88, 0x00, 0x08, 0x00, 0x08, 0x00, 0x08, 0x00, 0x08, \
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0x00, 0x08, 0x00, 0x08, 0x00, 0x08, 0x00, 0x08, 0x00 \
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#define AGX_BLEND \
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0x09, 0x00, 0x00, 0x04, 0xf0, 0xfc, 0x80, 0x03
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/* Clears the tilebuffer, where u6-u7 are preloaded with the FP16 clear colour
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0: 7e018c098040 bitop_mov r0, u6
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6: 7e058e098000 bitop_mov r1, u7
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c: 09000004f0fc8003 TODO.blend
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*/
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static uint8_t shader_clear[] = {
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0x7e, 0x01, 0x8c, 0x09, 0x80, 0x40,
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0x7e, 0x05, 0x8e, 0x09, 0x80, 0x00,
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AGX_BLEND,
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AGX_STOP
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};
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static uint8_t shader_store[] = {
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0x7e, 0x00, 0x04, 0x09, 0x80, 0x00,
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0xb1, 0x80, 0x00, 0x80, 0x00, 0x4a, 0x00, 0x00, 0x0a, 0x00,
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AGX_STOP
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};
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void
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agx_internal_shaders(struct agx_device *dev)
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{
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unsigned clear_offset = 0;
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unsigned store_offset = 1024;
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struct agx_bo *bo = agx_bo_create(dev, 4096, AGX_MEMORY_TYPE_SHADER);
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memcpy(((uint8_t *) bo->ptr.cpu) + clear_offset, shader_clear, sizeof(shader_clear));
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memcpy(((uint8_t *) bo->ptr.cpu) + store_offset, shader_store, sizeof(shader_store));
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dev->internal.bo = bo;
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dev->internal.clear = bo->ptr.gpu + clear_offset;
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dev->internal.store = bo->ptr.gpu + store_offset;
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agx_build_reload_shader(dev);
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}
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@ -297,9 +297,9 @@ agx_batch_add_bo(struct agx_batch *batch, struct agx_bo *bo)
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}
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}
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/* Blit shaders */
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/* Blit shaders */
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void agx_build_reload_shader(struct agx_device *dev);
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void agx_blit(struct pipe_context *pipe,
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void agx_blit(struct pipe_context *pipe,
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const struct pipe_blit_info *info);
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const struct pipe_blit_info *info);
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void agx_internal_shaders(struct agx_device *dev);
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#endif
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#endif
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@ -283,47 +283,3 @@ demo_mem_map(void *map, size_t size, unsigned *handles, unsigned count,
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.index = 0
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.index = 0
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};
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};
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}
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}
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#define AGX_STOP \
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0x88, 0x00, 0x08, 0x00, 0x08, 0x00, 0x08, 0x00, 0x08, \
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0x00, 0x08, 0x00, 0x08, 0x00, 0x08, 0x00, 0x08, 0x00 \
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#define AGX_BLEND \
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0x09, 0x00, 0x00, 0x04, 0xf0, 0xfc, 0x80, 0x03
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/* Clears the tilebuffer, where u6-u7 are preloaded with the FP16 clear colour
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0: 7e018c098040 bitop_mov r0, u6
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6: 7e058e098000 bitop_mov r1, u7
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c: 09000004f0fc8003 TODO.blend
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*/
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uint8_t shader_clear[] = {
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0x7e, 0x01, 0x8c, 0x09, 0x80, 0x40,
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0x7e, 0x05, 0x8e, 0x09, 0x80, 0x00,
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AGX_BLEND,
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AGX_STOP
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};
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uint8_t shader_store[] = {
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0x7e, 0x00, 0x04, 0x09, 0x80, 0x00,
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0xb1, 0x80, 0x00, 0x80, 0x00, 0x4a, 0x00, 0x00, 0x0a, 0x00,
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AGX_STOP
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};
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void
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agx_internal_shaders(struct agx_device *dev)
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{
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unsigned clear_offset = 0;
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unsigned store_offset = 1024;
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struct agx_bo *bo = agx_bo_create(dev, 4096, AGX_MEMORY_TYPE_SHADER);
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memcpy(((uint8_t *) bo->ptr.cpu) + clear_offset, shader_clear, sizeof(shader_clear));
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memcpy(((uint8_t *) bo->ptr.cpu) + store_offset, shader_store, sizeof(shader_store));
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dev->internal.bo = bo;
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dev->internal.clear = bo->ptr.gpu + clear_offset;
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dev->internal.store = bo->ptr.gpu + store_offset;
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agx_build_reload_shader(dev);
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}
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@ -14,6 +14,3 @@ void
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demo_mem_map(void *map, size_t size, unsigned *handles,
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demo_mem_map(void *map, size_t size, unsigned *handles,
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unsigned count, uint64_t cmdbuf_id, uint64_t
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unsigned count, uint64_t cmdbuf_id, uint64_t
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encoder_id, unsigned cmdbuf_size);
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encoder_id, unsigned cmdbuf_size);
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void
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agx_internal_shaders(struct agx_device *dev);
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