asahi: Move fixed internal shaders to agx_blit.c

A more natural place to put them, as the clear/store shaders use a similar
mechanism as the reload shaders. Now magic.c is exclusively kernel side piping.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
This commit is contained in:
Alyssa Rosenzweig 2021-07-10 10:48:56 -04:00
parent c70f45c759
commit 0a7e22a968
4 changed files with 51 additions and 50 deletions

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@ -28,7 +28,7 @@
#include "asahi/compiler/agx_compile.h"
#include "gallium/auxiliary/util/u_blitter.h"
void
static void
agx_build_reload_shader(struct agx_device *dev)
{
nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_FRAGMENT,
@ -132,3 +132,51 @@ agx_blit(struct pipe_context *pipe,
agx_blitter_save(ctx, ctx->blitter, info->render_condition_enable);
util_blitter_blit(ctx->blitter, info);
}
/* We need some fixed shaders for common rendering tasks. When colour buffer
* reload is not in use, a shader is used to clear a particular colour. At the
* end of rendering a tile, a shader is used to write it out. These shaders are
* too trivial to go through the compiler at this stage. */
#define AGX_STOP \
0x88, 0x00, 0x08, 0x00, 0x08, 0x00, 0x08, 0x00, 0x08, \
0x00, 0x08, 0x00, 0x08, 0x00, 0x08, 0x00, 0x08, 0x00 \
#define AGX_BLEND \
0x09, 0x00, 0x00, 0x04, 0xf0, 0xfc, 0x80, 0x03
/* Clears the tilebuffer, where u6-u7 are preloaded with the FP16 clear colour
0: 7e018c098040 bitop_mov r0, u6
6: 7e058e098000 bitop_mov r1, u7
c: 09000004f0fc8003 TODO.blend
*/
static uint8_t shader_clear[] = {
0x7e, 0x01, 0x8c, 0x09, 0x80, 0x40,
0x7e, 0x05, 0x8e, 0x09, 0x80, 0x00,
AGX_BLEND,
AGX_STOP
};
static uint8_t shader_store[] = {
0x7e, 0x00, 0x04, 0x09, 0x80, 0x00,
0xb1, 0x80, 0x00, 0x80, 0x00, 0x4a, 0x00, 0x00, 0x0a, 0x00,
AGX_STOP
};
void
agx_internal_shaders(struct agx_device *dev)
{
unsigned clear_offset = 0;
unsigned store_offset = 1024;
struct agx_bo *bo = agx_bo_create(dev, 4096, AGX_MEMORY_TYPE_SHADER);
memcpy(((uint8_t *) bo->ptr.cpu) + clear_offset, shader_clear, sizeof(shader_clear));
memcpy(((uint8_t *) bo->ptr.cpu) + store_offset, shader_store, sizeof(shader_store));
dev->internal.bo = bo;
dev->internal.clear = bo->ptr.gpu + clear_offset;
dev->internal.store = bo->ptr.gpu + store_offset;
agx_build_reload_shader(dev);
}

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@ -297,9 +297,9 @@ agx_batch_add_bo(struct agx_batch *batch, struct agx_bo *bo)
}
/* Blit shaders */
void agx_build_reload_shader(struct agx_device *dev);
void agx_blit(struct pipe_context *pipe,
const struct pipe_blit_info *info);
void agx_internal_shaders(struct agx_device *dev);
#endif

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@ -283,47 +283,3 @@ demo_mem_map(void *map, size_t size, unsigned *handles, unsigned count,
.index = 0
};
}
#define AGX_STOP \
0x88, 0x00, 0x08, 0x00, 0x08, 0x00, 0x08, 0x00, 0x08, \
0x00, 0x08, 0x00, 0x08, 0x00, 0x08, 0x00, 0x08, 0x00 \
#define AGX_BLEND \
0x09, 0x00, 0x00, 0x04, 0xf0, 0xfc, 0x80, 0x03
/* Clears the tilebuffer, where u6-u7 are preloaded with the FP16 clear colour
0: 7e018c098040 bitop_mov r0, u6
6: 7e058e098000 bitop_mov r1, u7
c: 09000004f0fc8003 TODO.blend
*/
uint8_t shader_clear[] = {
0x7e, 0x01, 0x8c, 0x09, 0x80, 0x40,
0x7e, 0x05, 0x8e, 0x09, 0x80, 0x00,
AGX_BLEND,
AGX_STOP
};
uint8_t shader_store[] = {
0x7e, 0x00, 0x04, 0x09, 0x80, 0x00,
0xb1, 0x80, 0x00, 0x80, 0x00, 0x4a, 0x00, 0x00, 0x0a, 0x00,
AGX_STOP
};
void
agx_internal_shaders(struct agx_device *dev)
{
unsigned clear_offset = 0;
unsigned store_offset = 1024;
struct agx_bo *bo = agx_bo_create(dev, 4096, AGX_MEMORY_TYPE_SHADER);
memcpy(((uint8_t *) bo->ptr.cpu) + clear_offset, shader_clear, sizeof(shader_clear));
memcpy(((uint8_t *) bo->ptr.cpu) + store_offset, shader_store, sizeof(shader_store));
dev->internal.bo = bo;
dev->internal.clear = bo->ptr.gpu + clear_offset;
dev->internal.store = bo->ptr.gpu + store_offset;
agx_build_reload_shader(dev);
}

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@ -14,6 +14,3 @@ void
demo_mem_map(void *map, size_t size, unsigned *handles,
unsigned count, uint64_t cmdbuf_id, uint64_t
encoder_id, unsigned cmdbuf_size);
void
agx_internal_shaders(struct agx_device *dev);