diff --git a/src/gallium/drivers/radeonsi/si_gfx_cs.c b/src/gallium/drivers/radeonsi/si_gfx_cs.c
index 922fc560d74..39184e0e9da 100644
--- a/src/gallium/drivers/radeonsi/si_gfx_cs.c
+++ b/src/gallium/drivers/radeonsi/si_gfx_cs.c
@@ -54,13 +54,7 @@ void si_need_gfx_cs_space(struct si_context *ctx)
 	ctx->gtt = 0;
 	ctx->vram = 0;
 
-	/* If the IB is sufficiently large, don't count the space needed
-	 * and just flush if there is not enough space left.
-	 *
-	 * Also reserve space for stopping queries at the end of IB, because
-	 * the number of active queries is mostly unlimited.
-	 */
-	unsigned need_dwords = 2048 + ctx->num_cs_dw_queries_suspend;
+	unsigned need_dwords = si_get_minimum_num_gfx_cs_dwords(ctx);
 	if (!ctx->ws->cs_check_space(cs, need_dwords))
 		si_flush_gfx_cs(ctx, RADEON_FLUSH_ASYNC_START_NEXT_GFX_IB_NOW, NULL);
 }
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index e45ef62ecfe..26b12a8a674 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -1434,6 +1434,17 @@ si_tile_mode_index(struct si_texture *tex, unsigned level, bool stencil)
 		return tex->surface.u.legacy.tiling_index[level];
 }
 
+static inline unsigned
+si_get_minimum_num_gfx_cs_dwords(struct si_context *sctx)
+{
+	/* Don't count the needed CS space exactly and just use an upper bound.
+	 *
+	 * Also reserve space for stopping queries at the end of IB, because
+	 * the number of active queries is unlimited in theory.
+	 */
+	return 2048 + sctx->num_cs_dw_queries_suspend;
+}
+
 static inline void
 si_context_add_resource_size(struct si_context *sctx, struct pipe_resource *r)
 {