KonstantinSeurer
/
mesa
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

asahi: Add Gallium driver 

Forked from noop, with some code from Panfrost.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
This commit is contained in:
Alyssa Rosenzweig 2021-04-21 01:06:41 +05:30 committed by Alyssa Rosenzweig
parent 0ad6bacb73
commit 080b05e29e
13 changed files with 2465 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
meson.build
View File

@ -236,6 +236,7 @@ with_gallium_swr = gallium_drivers.contains('swr')
with_gallium_lima = gallium_drivers.contains('lima')
with_gallium_zink = gallium_drivers.contains('zink')
with_gallium_d3d12 = gallium_drivers.contains('d3d12')
with_gallium_asahi = gallium_drivers.contains('asahi')
with_gallium = gallium_drivers.length() != 0
with_gallium_kmsro = with_gallium_v3d or with_gallium_vc4 or with_gallium_etnaviv or with_gallium_panfrost or with_gallium_lima or with_gallium_freedreno

2
meson_options.txt
View File

@ -67,7 +67,7 @@ option(
choices : [
'auto', 'kmsro', 'radeonsi', 'r300', 'r600', 'nouveau', 'freedreno',
'swrast', 'v3d', 'vc4', 'etnaviv', 'tegra', 'i915', 'svga', 'virgl',
'swr', 'panfrost', 'iris', 'lima', 'zink', 'd3d12'
'swr', 'panfrost', 'iris', 'lima', 'zink', 'd3d12', 'asahi'
],
description : 'List of gallium drivers to build. If this is set to auto all drivers applicable to the target OS/architecture will be built'
)

12
src/gallium/auxiliary/target-helpers/inline_sw_helper.h
View File

@ -33,6 +33,10 @@
#include "d3d12/d3d12_public.h"
#endif
#ifdef GALLIUM_ASAHI
#include "asahi/agx_public.h"
#endif
static inline struct pipe_screen *
sw_screen_create_named(struct sw_winsys *winsys, const char *driver)
{
@ -71,6 +75,11 @@ sw_screen_create_named(struct sw_winsys *winsys, const char *driver)
screen = d3d12_create_dxcore_screen(winsys, NULL);
#endif
#if defined(GALLIUM_ASAHI)
if (screen == NULL && strcmp(driver, "asahi") == 0)
screen = agx_screen_create(winsys);
#endif
return screen ? debug_screen_wrap(screen) : NULL;
}
@ -84,6 +93,9 @@ sw_screen_create(struct sw_winsys *winsys)
#if defined(GALLIUM_D3D12)
only_sw ? "" : "d3d12",
#endif
#if defined(GALLIUM_ASAHI)
only_sw ? "" : "asahi",
#endif
#if defined(GALLIUM_LLVMPIPE)
"llvmpipe",
#endif

12
src/gallium/auxiliary/target-helpers/sw_helper.h
View File

@ -21,6 +21,10 @@
#include "d3d12/d3d12_public.h"
#endif
#ifdef GALLIUM_ASAHI
#include "asahi/agx_public.h"
#endif
#ifdef GALLIUM_SOFTPIPE
#include "softpipe/sp_public.h"
#endif
@ -76,6 +80,11 @@ sw_screen_create_named(struct sw_winsys *winsys, const char *driver)
screen = d3d12_create_dxcore_screen(winsys, NULL);
#endif
#if defined(GALLIUM_ASAHI)
if (screen == NULL && strcmp(driver, "asahi") == 0)
screen = agx_screen_create(winsys);
#endif
return screen;
}
@ -89,6 +98,9 @@ sw_screen_create(struct sw_winsys *winsys)
#if defined(GALLIUM_D3D12)
only_sw ? "" : "d3d12",
#endif
#if defined(GALLIUM_ASAHI)
only_sw ? "" : "asahi",
#endif
#if defined(GALLIUM_LLVMPIPE)
"llvmpipe",
#endif

963
src/gallium/drivers/asahi/agx_pipe.c Normal file
View File

@ -0,0 +1,963 @@
/*
* Copyright 2010 Red Hat Inc.
* Copyright 2006 VMware, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include <stdio.h>
#include <errno.h>
#include "pipe/p_defines.h"
#include "pipe/p_state.h"
#include "pipe/p_context.h"
#include "pipe/p_screen.h"
#include "util/u_memory.h"
#include "util/u_screen.h"
#include "util/u_inlines.h"
#include "util/format/u_format.h"
#include "util/u_upload_mgr.h"
#include "util/half_float.h"
#include "frontend/winsys_handle.h"
#include "frontend/sw_winsys.h"
#include "gallium/auxiliary/util/u_transfer.h"
#include "gallium/auxiliary/util/u_surface.h"
#include "agx_public.h"
#include "agx_state.h"
#include "magic.h"
#include "asahi/compiler/agx_compile.h"
#include "asahi/lib/decode.h"
#include "asahi/lib/tiling.h"
static const struct debug_named_value agx_debug_options[] = {
{"trace", AGX_DBG_TRACE, "Trace the command stream"},
DEBUG_NAMED_VALUE_END
};
void agx_init_state_functions(struct pipe_context *ctx);
static struct pipe_query *
agx_create_query(struct pipe_context *ctx, unsigned query_type, unsigned index)
{
struct agx_query *query = CALLOC_STRUCT(agx_query);
return (struct pipe_query *)query;
}
static void
agx_destroy_query(struct pipe_context *ctx, struct pipe_query *query)
{
FREE(query);
}
static bool
agx_begin_query(struct pipe_context *ctx, struct pipe_query *query)
{
return true;
}
static bool
agx_end_query(struct pipe_context *ctx, struct pipe_query *query)
{
return true;
}
static bool
agx_get_query_result(struct pipe_context *ctx,
struct pipe_query *query,
bool wait,
union pipe_query_result *vresult)
{
uint64_t *result = (uint64_t*)vresult;
*result = 0;
return true;
}
static void
agx_set_active_query_state(struct pipe_context *pipe, bool enable)
{
}
/*
* resource
*/
static struct pipe_resource *
agx_resource_from_handle(struct pipe_screen *pscreen,
const struct pipe_resource *templat,
struct winsys_handle *whandle,
unsigned usage)
{
unreachable("Imports todo");
}
static bool
agx_resource_get_handle(struct pipe_screen *pscreen,
struct pipe_context *ctx,
struct pipe_resource *pt,
struct winsys_handle *handle,
unsigned usage)
{
unreachable("Handles todo");
}
static struct pipe_resource *
agx_resource_create(struct pipe_screen *screen,
const struct pipe_resource *templ)
{
struct agx_device *dev = agx_device(screen);
struct agx_resource *nresource;
unsigned stride;
uint64_t modifier = DRM_FORMAT_MOD_LINEAR;
if (templ->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_SAMPLER_VIEW))
modifier = DRM_FORMAT_MOD_APPLE_64X64_MORTON_ORDER;
nresource = CALLOC_STRUCT(agx_resource);
if (!nresource)
return NULL;
stride = util_format_get_stride(templ->format, templ->width0);
nresource->base = *templ;
nresource->base.screen = screen;
nresource->modifier = modifier;
nresource->slices[0].line_stride = stride;
unsigned size = 4 * ALIGN_POT(templ->width0, 64) * ALIGN_POT(templ->height0, 64) * templ->depth0;
nresource->bo = agx_bo_create(dev, size, AGX_MEMORY_TYPE_FRAMEBUFFER);
if (!nresource->bo) {
FREE(nresource);
return NULL;
}
pipe_reference_init(&nresource->base.reference, 1);
struct sw_winsys *winsys = ((struct agx_screen *) screen)->winsys;
if (templ->bind & (PIPE_BIND_DISPLAY_TARGET |
PIPE_BIND_SCANOUT |
PIPE_BIND_SHARED)) {
nresource->dt = winsys->displaytarget_create(winsys,
templ->bind,
templ->format,
templ->width0,
templ->height0,
64,
NULL /*map_front_private*/,
&nresource->dt_stride);
if (nresource->dt == NULL) {
agx_bo_unreference(nresource->bo);
FREE(nresource);
return NULL;
}
}
return &nresource->base;
}
static void
agx_resource_destroy(struct pipe_screen *screen,
struct pipe_resource *prsrc)
{
struct agx_resource *rsrc = (struct agx_resource *)prsrc;
if (rsrc->dt) {
/* display target */
struct agx_screen *agx_screen = (struct agx_screen*)screen;
struct sw_winsys *winsys = agx_screen->winsys;
winsys->displaytarget_destroy(winsys, rsrc->dt);
}
agx_bo_unreference(rsrc->bo);
FREE(rsrc);
}
/*
* transfer
*/
static void
agx_transfer_flush_region(struct pipe_context *pipe,
struct pipe_transfer *transfer,
const struct pipe_box *box)
{
}
static void *
agx_transfer_map(struct pipe_context *pctx,
struct pipe_resource *resource,
unsigned level,
unsigned usage, /* a combination of PIPE_MAP_x */
const struct pipe_box *box,
struct pipe_transfer **out_transfer)
{
struct agx_context *ctx = agx_context(pctx);
struct agx_resource *rsrc = agx_resource(resource);
unsigned bytes_per_pixel = util_format_get_blocksize(resource->format);
struct agx_bo *bo = rsrc->bo;
/* Can't map tiled/compressed directly */
if ((usage & PIPE_MAP_DIRECTLY) && rsrc->modifier != DRM_FORMAT_MOD_LINEAR)
return NULL;
if (ctx->batch->cbufs[0] && resource == ctx->batch->cbufs[0]->texture)
pctx->flush(pctx, NULL, 0);
struct agx_transfer *transfer = CALLOC_STRUCT(agx_transfer);
transfer->base.level = level;
transfer->base.usage = usage;
transfer->base.box = *box;
pipe_resource_reference(&transfer->base.resource, resource);
*out_transfer = &transfer->base;
if (rsrc->modifier == DRM_FORMAT_MOD_APPLE_64X64_MORTON_ORDER) {
transfer->base.stride = box->width * bytes_per_pixel;
transfer->base.layer_stride = transfer->base.stride * box->height;
transfer->map = calloc(transfer->base.layer_stride, box->depth);
assert(box->depth == 1);
if ((usage & PIPE_MAP_READ) && rsrc->slices[level].data_valid) {
agx_detile(
((uint8_t *) bo->ptr.cpu) + rsrc->slices[level].offset,
transfer->map,
u_minify(resource->width0, level), bytes_per_pixel * 8,
transfer->base.stride / bytes_per_pixel,
box->x, box->y, box->x + box->width, box->y + box->height);
}
return transfer->map;
} else {
assert (rsrc->modifier == DRM_FORMAT_MOD_LINEAR);
transfer->base.stride = rsrc->slices[level].line_stride;
transfer->base.layer_stride = 0; // TODO
/* Be conservative for direct writes */
if ((usage & PIPE_MAP_WRITE) && (usage & PIPE_MAP_DIRECTLY))
rsrc->slices[level].data_valid = true;
return ((uint8_t *) bo->ptr.cpu)
+ rsrc->slices[level].offset
+ transfer->base.box.z * transfer->base.layer_stride
+ transfer->base.box.y * rsrc->slices[level].line_stride
+ transfer->base.box.x * bytes_per_pixel;
}
}
static void
agx_transfer_unmap(struct pipe_context *pctx,
struct pipe_transfer *transfer)
{
/* Gallium expects writeback here, so we tile */
struct agx_transfer *trans = agx_transfer(transfer);
struct pipe_resource *prsrc = transfer->resource;
struct agx_resource *rsrc = (struct agx_resource *) prsrc;
unsigned bytes_per_pixel = util_format_get_blocksize(prsrc->format);
if (transfer->usage & PIPE_MAP_WRITE)
rsrc->slices[transfer->level].data_valid = true;
/* Tiling will occur in software from a staging cpu buffer */
if ((transfer->usage & PIPE_MAP_WRITE) &&
rsrc->modifier == DRM_FORMAT_MOD_APPLE_64X64_MORTON_ORDER) {
struct agx_bo *bo = rsrc->bo;
assert(trans->map != NULL);
assert(transfer->box.depth == 1);
agx_tile(
((uint8_t *) bo->ptr.cpu) + rsrc->slices[transfer->level].offset,
trans->map,
u_minify(transfer->resource->width0, transfer->level),
bytes_per_pixel * 8,
transfer->stride / bytes_per_pixel,
transfer->box.x, transfer->box.y,
transfer->box.x + transfer->box.width,
transfer->box.y + transfer->box.height);
}
/* Free the transfer */
free(trans->map);
pipe_resource_reference(&transfer->resource, NULL);
FREE(transfer);
}
/*
* clear/copy
*/
static void
agx_clear(struct pipe_context *pctx, unsigned buffers, const struct pipe_scissor_state *scissor_state,
const union pipe_color_union *color, double depth, unsigned stencil)
{
struct agx_context *ctx = agx_context(pctx);
ctx->batch->clear |= buffers;
memcpy(ctx->batch->clear_color, color->f, sizeof(color->f));
}
static void
agx_blit(struct pipe_context *ctx,
const struct pipe_blit_info *info)
{
}
static void
agx_flush_resource(struct pipe_context *ctx,
struct pipe_resource *resource)
{
}
/*
* context
*/
static void
agx_flush(struct pipe_context *pctx,
struct pipe_fence_handle **fence,
unsigned flags)
{
struct agx_context *ctx = agx_context(pctx);
if (fence)
*fence = NULL;
/* TODO */
if (!ctx->batch->cbufs[0])
return;
/* Nothing to do */
if (!(ctx->batch->draw | ctx->batch->clear))
return;
/* Finalize the encoder */
uint8_t stop[] = {
0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, // Stop
};
memcpy(ctx->batch->encoder_current, stop, sizeof(stop));
/* Emit the commandbuffer */
uint16_t clear_colour[4] = {
_mesa_float_to_half(ctx->batch->clear_color[0]),
_mesa_float_to_half(ctx->batch->clear_color[1]),
_mesa_float_to_half(ctx->batch->clear_color[2]),
_mesa_float_to_half(ctx->batch->clear_color[3])
};
struct agx_device *dev = agx_device(pctx->screen);
uint64_t pipeline_clear =
agx_build_clear_pipeline(ctx,
dev->internal.clear,
agx_pool_upload(&ctx->batch->pool, clear_colour, sizeof(clear_colour)));
uint64_t pipeline_store =
agx_build_store_pipeline(ctx,
dev->internal.store,
agx_pool_upload(&ctx->batch->pool, ctx->render_target[0], sizeof(ctx->render_target)));
/* Pipelines must 64 aligned */
struct agx_ptr pipeline_null =
agx_pool_alloc_aligned(&ctx->batch->pipeline_pool, 64, 64);
memset(pipeline_null.cpu, 0, 64);
struct agx_resource *rt0 = agx_resource(ctx->batch->cbufs[0]->texture);
rt0->slices[0].data_valid = true;
/* BO list for a given batch consists of:
* - BOs for the batch's framebuffer surfaces
* - BOs for the batch's pools
* - BOs for the encoder
* - BO for internal shaders
* - BOs added to the batch explicitly
*/
struct agx_batch *batch = ctx->batch;
agx_batch_add_bo(batch, batch->encoder);
agx_batch_add_bo(batch, dev->internal.bo);
for (unsigned i = 0; i < batch->nr_cbufs; ++i) {
struct pipe_surface *surf = batch->cbufs[i];
assert(surf != NULL && surf->texture != NULL);
struct agx_resource *rsrc = agx_resource(surf->texture);
agx_batch_add_bo(batch, rsrc->bo);
}
if (batch->zsbuf)
unreachable("todo: zsbuf");
unsigned handle_count =
BITSET_COUNT(batch->bo_list) +
agx_pool_num_bos(&batch->pool) +
agx_pool_num_bos(&batch->pipeline_pool);
uint32_t *handles = calloc(sizeof(uint32_t), handle_count);
unsigned handle = 0, handle_i = 0;
BITSET_FOREACH_SET(handle, batch->bo_list, sizeof(batch->bo_list) * 8) {
handles[handle_i++] = handle;
}
agx_pool_get_bo_handles(&batch->pool, handles + handle_i);
handle_i += agx_pool_num_bos(&batch->pool);
agx_pool_get_bo_handles(&batch->pipeline_pool, handles + handle_i);
handle_i += agx_pool_num_bos(&batch->pipeline_pool);
/* Size calculation should've been exact */
assert(handle_i == handle_count);
/* Generate the mapping table from the BO list */
demo_mem_map(dev->memmap.ptr.cpu, dev->memmap.size, handles, handle_count,
0xDEADBEEF, 0xCAFECAFE);
free(handles);
demo_cmdbuf(dev->cmdbuf.ptr.cpu,
dev->cmdbuf.size,
&ctx->batch->pool,
ctx->batch->encoder->ptr.gpu,
ctx->batch->width,
ctx->batch->height,
pipeline_null.gpu,
pipeline_clear,
pipeline_store,
rt0->bo->ptr.gpu);
agx_submit_cmdbuf(dev, dev->cmdbuf.handle, dev->memmap.handle, dev->queue.id);
agx_wait_queue(dev->queue);
if (dev->debug & AGX_DBG_TRACE) {
agxdecode_cmdstream(dev->cmdbuf.handle, dev->memmap.handle, true);
agxdecode_next_frame();
}
memset(batch->bo_list, 0, sizeof(batch->bo_list));
agx_pool_cleanup(&ctx->batch->pool);
agx_pool_cleanup(&ctx->batch->pipeline_pool);
agx_pool_init(&ctx->batch->pool, dev, AGX_MEMORY_TYPE_FRAMEBUFFER, true);
agx_pool_init(&ctx->batch->pipeline_pool, dev, AGX_MEMORY_TYPE_CMDBUF_32, true);
ctx->batch->clear = 0;
ctx->batch->draw = 0;
ctx->batch->encoder_current = ctx->batch->encoder->ptr.cpu;
}
static void
agx_destroy_context(struct pipe_context *ctx)
{
if (ctx->stream_uploader)
u_upload_destroy(ctx->stream_uploader);
FREE(ctx);
}
static void
agx_invalidate_resource(struct pipe_context *ctx,
struct pipe_resource *resource)
{
}
static struct pipe_context *
agx_create_context(struct pipe_screen *screen,
void *priv, unsigned flags)
{
struct agx_context *ctx = CALLOC_STRUCT(agx_context);
struct pipe_context *pctx = &ctx->base;
if (!ctx)
return NULL;
pctx->screen = screen;
pctx->priv = priv;
ctx->batch = CALLOC_STRUCT(agx_batch);
agx_pool_init(&ctx->batch->pool,
agx_device(screen), AGX_MEMORY_TYPE_FRAMEBUFFER, true);
agx_pool_init(&ctx->batch->pipeline_pool,
agx_device(screen), AGX_MEMORY_TYPE_SHADER, true);
ctx->batch->encoder = agx_bo_create(agx_device(screen), 0x80000, AGX_MEMORY_TYPE_FRAMEBUFFER);
ctx->batch->encoder_current = ctx->batch->encoder->ptr.cpu;
/* Upload fixed shaders (TODO: compile them?) */
pctx->stream_uploader = u_upload_create_default(pctx);
if (!pctx->stream_uploader) {
FREE(pctx);
return NULL;
}
pctx->const_uploader = pctx->stream_uploader;
pctx->destroy = agx_destroy_context;
pctx->flush = agx_flush;
pctx->clear = agx_clear;
pctx->resource_copy_region = util_resource_copy_region;
pctx->blit = agx_blit;
pctx->flush_resource = agx_flush_resource;
pctx->create_query = agx_create_query;
pctx->destroy_query = agx_destroy_query;
pctx->begin_query = agx_begin_query;
pctx->end_query = agx_end_query;
pctx->get_query_result = agx_get_query_result;
pctx->set_active_query_state = agx_set_active_query_state;
pctx->transfer_map = agx_transfer_map;
pctx->transfer_flush_region = agx_transfer_flush_region;
pctx->transfer_unmap = agx_transfer_unmap;
pctx->buffer_subdata = u_default_buffer_subdata;
pctx->texture_subdata = u_default_texture_subdata;
pctx->invalidate_resource = agx_invalidate_resource;
agx_init_state_functions(pctx);
return pctx;
}
static void
agx_flush_frontbuffer(struct pipe_screen *_screen,
struct pipe_context *pctx,
struct pipe_resource *prsrc,
unsigned level, unsigned layer,
void *context_private, struct pipe_box *box)
{
struct agx_resource *rsrc = (struct agx_resource *) prsrc;
struct agx_screen *agx_screen = (struct agx_screen*)_screen;
struct sw_winsys *winsys = agx_screen->winsys;
/* Dump the framebuffer */
assert (rsrc->dt);
void *map = winsys->displaytarget_map(winsys, rsrc->dt, PIPE_USAGE_DEFAULT);
assert(map != NULL);
agx_detile(rsrc->bo->ptr.cpu, map,
rsrc->base.width0, 32, rsrc->dt_stride / 4,
0, 0, rsrc->base.width0, rsrc->base.height0);
winsys->displaytarget_display(winsys, rsrc->dt, context_private, box);
}
static const char *
agx_get_vendor(struct pipe_screen* pscreen)
{
return "Asahi";
}
static const char *
agx_get_device_vendor(struct pipe_screen* pscreen)
{
return "Apple";
}
static const char *
agx_get_name(struct pipe_screen* pscreen)
{
return "Apple M1 (G13G B0)";
}
static int
agx_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
{
switch (param) {
case PIPE_CAP_NPOT_TEXTURES:
case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
case PIPE_CAP_VERTEX_SHADER_SATURATE:
case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
case PIPE_CAP_DEPTH_CLIP_DISABLE:
case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
return 1;
case PIPE_CAP_MAX_RENDER_TARGETS:
return 1;
case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
return 0;
case PIPE_CAP_OCCLUSION_QUERY:
case PIPE_CAP_PRIMITIVE_RESTART:
case PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX:
return true;
case PIPE_CAP_SAMPLER_VIEW_TARGET:
case PIPE_CAP_TEXTURE_SWIZZLE:
case PIPE_CAP_BLEND_EQUATION_SEPARATE:
case PIPE_CAP_INDEP_BLEND_ENABLE:
case PIPE_CAP_INDEP_BLEND_FUNC:
case PIPE_CAP_ACCELERATED:
case PIPE_CAP_UMA:
case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
case PIPE_CAP_CS_DERIVED_SYSTEM_VALUES_SUPPORTED:
case PIPE_CAP_PACKED_UNIFORMS:
return 1;
case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
return 0;
case PIPE_CAP_GLSL_FEATURE_LEVEL:
case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
return 130;
case PIPE_CAP_ESSL_FEATURE_LEVEL:
return 120;
case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
return 16;
case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
return 65536;
case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
return 64;
case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
return 1;
case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
return 16384;
case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
return 13;
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
return 0;
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
case PIPE_CAP_TGSI_TEXCOORD:
return 1;
case PIPE_CAP_SEAMLESS_CUBE_MAP:
case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
return true;
case PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET:
return 0xffff;
case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
return 0;
case PIPE_CAP_ENDIANNESS:
return PIPE_ENDIAN_LITTLE;
case PIPE_CAP_VIDEO_MEMORY: {
uint64_t system_memory;
if (!os_get_total_physical_memory(&system_memory))
return 0;
return (int)(system_memory >> 20);
}
case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
return 4;
case PIPE_CAP_MAX_VARYINGS:
return 16;
case PIPE_CAP_FLATSHADE:
case PIPE_CAP_TWO_SIDED_COLOR:
case PIPE_CAP_ALPHA_TEST:
case PIPE_CAP_CLIP_PLANES:
case PIPE_CAP_PACKED_STREAM_OUTPUT:
case PIPE_CAP_NIR_IMAGES_AS_DEREF:
return 0;
case PIPE_CAP_SHAREABLE_SHADERS:
return 1;
default:
return u_pipe_screen_get_param_defaults(pscreen, param);
}
}
static float
agx_get_paramf(struct pipe_screen* pscreen,
enum pipe_capf param)
{
switch (param) {
case PIPE_CAPF_MAX_LINE_WIDTH:
case PIPE_CAPF_MAX_LINE_WIDTH_AA:
return 255.0; /* arbitrary */
case PIPE_CAPF_MAX_POINT_WIDTH:
case PIPE_CAPF_MAX_POINT_WIDTH_AA:
return 1024.0;
case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
return 16.0;
case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
return 16.0; /* arbitrary */
case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
return 0.0f;
default:
debug_printf("Unexpected PIPE_CAPF %d query\n", param);
return 0.0;
}
}
static int
agx_get_shader_param(struct pipe_screen* pscreen,
enum pipe_shader_type shader,
enum pipe_shader_cap param)
{
if (shader != PIPE_SHADER_VERTEX &&
shader != PIPE_SHADER_FRAGMENT)
return 0;
/* this is probably not totally correct.. but it's a start: */
switch (param) {
case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
return 16384;
case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
return 1024;
case PIPE_SHADER_CAP_MAX_INPUTS:
return 16;
case PIPE_SHADER_CAP_MAX_OUTPUTS:
return shader == PIPE_SHADER_FRAGMENT ? 1 : 16;
case PIPE_SHADER_CAP_MAX_TEMPS:
return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
return 16 * 1024 * sizeof(float);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return 16;
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
return 0;
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
case PIPE_SHADER_CAP_SUBROUTINES:
case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
return 0;
case PIPE_SHADER_CAP_FP16:
case PIPE_SHADER_CAP_INTEGERS:
case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS:
case PIPE_SHADER_CAP_FP16_DERIVATIVES:
case PIPE_SHADER_CAP_FP16_CONST_BUFFERS:
case PIPE_SHADER_CAP_INT16:
return 1;
case PIPE_SHADER_CAP_INT64_ATOMICS:
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
return 0;
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
return 16; /* XXX: How many? */
case PIPE_SHADER_CAP_PREFERRED_IR:
return PIPE_SHADER_IR_NIR;
case PIPE_SHADER_CAP_SUPPORTED_IRS:
return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_NIR_SERIALIZED);
case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
return 32;
case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
return 0;
default:
/* Other params are unknown */
return 0;
}
return 0;
}
static int
agx_get_compute_param(struct pipe_screen *pscreen,
enum pipe_shader_ir ir_type,
enum pipe_compute_cap param,
void *ret)
{
return 0;
}
static bool
agx_is_format_supported(struct pipe_screen* pscreen,
enum pipe_format format,
enum pipe_texture_target target,
unsigned sample_count,
unsigned storage_sample_count,
unsigned usage)
{
const struct util_format_description *format_desc;
assert(target == PIPE_BUFFER ||
target == PIPE_TEXTURE_1D ||
target == PIPE_TEXTURE_1D_ARRAY ||
target == PIPE_TEXTURE_2D ||
target == PIPE_TEXTURE_2D_ARRAY ||
target == PIPE_TEXTURE_RECT ||
target == PIPE_TEXTURE_3D ||
target == PIPE_TEXTURE_CUBE ||
target == PIPE_TEXTURE_CUBE_ARRAY);
format_desc = util_format_description(format);
if (!format_desc)
return false;
if (sample_count > 1)
return false;
if (MAX2(sample_count, 1) != MAX2(storage_sample_count, 1))
return false;
/* TODO: formats */
if (usage & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_SAMPLER_VIEW))
return (format == PIPE_FORMAT_B8G8R8A8_UNORM);
/* TODO: formats */
if (usage & PIPE_BIND_VERTEX_BUFFER) {
switch (format) {
case PIPE_FORMAT_R32_FLOAT:
case PIPE_FORMAT_R32G32_FLOAT:
case PIPE_FORMAT_R32G32B32_FLOAT:
case PIPE_FORMAT_R32G32B32A32_FLOAT:
return true;
default:
return false;
}
}
/* TODO */
return true;
}
static uint64_t
agx_get_timestamp(struct pipe_screen *pscreen)
{
return 0;
}
static void
agx_destroy_screen(struct pipe_screen *screen)
{
agx_close_device(agx_device(screen));
ralloc_free(screen);
}
static void
agx_fence_reference(struct pipe_screen *screen,
struct pipe_fence_handle **ptr,
struct pipe_fence_handle *fence)
{
}
static bool
agx_fence_finish(struct pipe_screen *screen,
struct pipe_context *ctx,
struct pipe_fence_handle *fence,
uint64_t timeout)
{
return true;
}
static const void *
agx_get_compiler_options(struct pipe_screen *pscreen,
enum pipe_shader_ir ir,
enum pipe_shader_type shader)
{
return &agx_nir_options;
}
struct pipe_screen *
agx_screen_create(struct sw_winsys *winsys)
{
struct agx_screen *agx_screen;
struct pipe_screen *screen;
agx_screen = rzalloc(NULL, struct agx_screen);
if (!agx_screen)
return NULL;
screen = &agx_screen->pscreen;
agx_screen->winsys = winsys;
/* Set debug before opening */
agx_screen->dev.debug =
debug_get_flags_option("ASAHI_MESA_DEBUG", agx_debug_options, 0);
/* Try to open an AGX device */
if (!agx_open_device(screen, &agx_screen->dev)) {
ralloc_free(agx_screen);
return NULL;
}
screen->destroy = agx_destroy_screen;
screen->get_name = agx_get_name;
screen->get_vendor = agx_get_vendor;
screen->get_device_vendor = agx_get_device_vendor;
screen->get_param = agx_get_param;
screen->get_shader_param = agx_get_shader_param;
screen->get_compute_param = agx_get_compute_param;
screen->get_paramf = agx_get_paramf;
screen->is_format_supported = agx_is_format_supported;
screen->context_create = agx_create_context;
screen->resource_create = agx_resource_create;
screen->resource_from_handle = agx_resource_from_handle;
screen->resource_get_handle = agx_resource_get_handle;
screen->resource_destroy = agx_resource_destroy;
screen->flush_frontbuffer = agx_flush_frontbuffer;
screen->get_timestamp = agx_get_timestamp;
screen->fence_reference = agx_fence_reference;
screen->fence_finish = agx_fence_finish;
screen->get_compiler_options = agx_get_compiler_options;
agx_internal_shaders(&agx_screen->dev);
return screen;
}

38
src/gallium/drivers/asahi/agx_public.h Normal file
View File

@ -0,0 +1,38 @@
/*
* Copyright 2010 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef AGX_PUBLIC_H
#define AGX_PUBLIC_H
#ifdef __cplusplus
extern "C" {
#endif
struct pipe_screen;
struct sw_winsys;
struct pipe_screen *agx_screen_create(struct sw_winsys *winsys);
#ifdef __cplusplus
}
#endif
#endif

1181
src/gallium/drivers/asahi/agx_state.c Normal file
View File

File diff suppressed because it is too large Load Diff

229
src/gallium/drivers/asahi/agx_state.h Normal file
View File

@ -0,0 +1,229 @@
/*
* Copyright 2021 Alyssa Rosenzweig
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef AGX_STATE_H
#define AGX_STATE_H
#include "gallium/include/pipe/p_context.h"
#include "gallium/include/pipe/p_state.h"
#include "gallium/include/pipe/p_screen.h"
#include "asahi/lib/agx_pack.h"
#include "asahi/lib/agx_bo.h"
#include "asahi/lib/agx_device.h"
#include "asahi/lib/pool.h"
#include "asahi/compiler/agx_compile.h"
#include "util/hash_table.h"
#include "util/bitset.h"
struct agx_compiled_shader {
/* Mapped executable memory */
struct agx_bo *bo;
/* Varying descriptor (TODO: is this the right place?) */
uint64_t varyings;
/* # of varyings (currently vec4, should probably be changed) */
unsigned varying_count;
/* Metadata returned from the compiler */
struct agx_shader_info info;
};
struct agx_uncompiled_shader {
struct nir_shader *nir;
struct hash_table *variants;
/* Set on VS, passed to FS for linkage */
unsigned base_varying;
};
struct agx_stage {
struct agx_uncompiled_shader *shader;
uint32_t dirty;
struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
uint32_t cb_mask;
/* BOs for bound samplers. This is all the information we need at
* draw time to assemble the pipeline */
struct agx_bo *samplers[PIPE_MAX_SAMPLERS];
/* Sampler views need the full CSO due to Gallium state management */
struct agx_sampler_view *textures[PIPE_MAX_SHADER_SAMPLER_VIEWS];
unsigned texture_count;
};
struct agx_batch {
unsigned width, height, nr_cbufs;
struct pipe_surface *cbufs[8];
struct pipe_surface *zsbuf;
/* PIPE_CLEAR_* bitmask */
uint32_t clear, draw;
float clear_color[4];
/* Resource list requirements, represented as a bit set indexed by BO
* handles (GEM handles on Linux, or IOGPU's equivalent on macOS) */
BITSET_WORD bo_list[256];
struct agx_pool pool, pipeline_pool;
struct agx_bo *encoder;
uint8_t *encoder_current;
};
struct agx_zsa {
enum agx_zs_func z_func;
bool disable_z_write;
};
#define AGX_DIRTY_VERTEX (1 << 0)
struct agx_context {
struct pipe_context base;
struct agx_compiled_shader *vs, *fs;
uint32_t dirty;
struct agx_batch *batch;
struct pipe_vertex_buffer vertex_buffers[PIPE_MAX_ATTRIBS];
uint32_t vb_mask;
struct agx_stage stage[PIPE_SHADER_TYPES];
struct agx_attribute *attributes;
struct agx_rasterizer *rast;
struct agx_zsa zs;
uint8_t viewport[AGX_VIEWPORT_LENGTH];
uint8_t render_target[8][AGX_RENDER_TARGET_LENGTH];
};
static inline struct agx_context *
agx_context(struct pipe_context *pctx)
{
return (struct agx_context *) pctx;
}
struct agx_rasterizer {
struct pipe_rasterizer_state base;
uint8_t cull[AGX_CULL_LENGTH];
};
struct agx_query {
unsigned query;
};
struct agx_sampler_view {
struct pipe_sampler_view base;
/* Prepared descriptor */
struct agx_bo *desc;
};
struct agx_screen {
struct pipe_screen pscreen;
struct agx_device dev;
struct sw_winsys *winsys;
};
static inline struct agx_screen *
agx_screen(struct pipe_screen *p)
{
return (struct agx_screen *)p;
}
static inline struct agx_device *
agx_device(struct pipe_screen *p)
{
return &(agx_screen(p)->dev);
}
/* TODO: UABI, fake for macOS */
#ifndef DRM_FORMAT_MOD_LINEAR
#define DRM_FORMAT_MOD_LINEAR 1
#endif
#define DRM_FORMAT_MOD_APPLE_64X64_MORTON_ORDER (2)
struct agx_resource {
struct pipe_resource base;
uint64_t modifier;
/* Hardware backing */
struct agx_bo *bo;
/* Software backing (XXX) */
struct sw_displaytarget *dt;
unsigned dt_stride;
struct {
bool data_valid;
unsigned offset;
unsigned line_stride;
} slices[PIPE_MAX_TEXTURE_LEVELS];
};
static inline struct agx_resource *
agx_resource(struct pipe_resource *pctx)
{
return (struct agx_resource *) pctx;
}
struct agx_transfer {
struct pipe_transfer base;
void *map;
struct {
struct pipe_resource *rsrc;
struct pipe_box box;
} staging;
};
static inline struct agx_transfer *
agx_transfer(struct pipe_transfer *p)
{
return (struct agx_transfer *)p;
}
uint64_t
agx_push_location(struct agx_context *ctx, struct agx_push push,
enum pipe_shader_type stage);
uint64_t
agx_build_clear_pipeline(struct agx_context *ctx, uint32_t code, uint64_t clear_buf);
uint64_t
agx_build_store_pipeline(struct agx_context *ctx, uint32_t code,
uint64_t render_target);
/* Add a BO to a batch. This needs to be amortized O(1) since it's called in
* hot paths. To achieve this we model BO lists by bit sets */
static inline void
agx_batch_add_bo(struct agx_batch *batch, struct agx_bo *bo)
{
if (unlikely(bo->handle > (sizeof(batch->bo_list) * 8)))
unreachable("todo: growable");
BITSET_SET(batch->bo_list, bo->handle);
}
#endif

16
src/gallium/drivers/asahi/meson.build
View File

@ -19,6 +19,22 @@
# SOFTWARE.
files_asahi = files(
'agx_pipe.c',
'agx_state.c',
'agx_uniforms.c',
'magic.c',
)
libasahi = static_library(
'asahi',
files_asahi,
include_directories : [inc_gallium_aux, inc_gallium, inc_include, inc_src],
c_args : [c_msvc_compat_args],
gnu_symbol_visibility : 'hidden',
dependencies : idep_nir,
)
driver_asahi = declare_dependency(
compile_args : '-DGALLIUM_ASAHI',
link_with : [libasahi, libasahi_compiler, libasahi_lib, libasahi_decode]
)

5
src/gallium/meson.build
View File

@ -58,6 +58,11 @@ if with_gallium_softpipe
else
driver_swrast = declare_dependency()
endif
if with_gallium_asahi
subdir('drivers/asahi')
else
driver_asahi = declare_dependency()
endif
if with_gallium_r300 or with_gallium_radeonsi or with_gallium_r600
subdir('winsys/radeon/drm')
endif

6
src/gallium/targets/dri/meson.build
View File

@ -57,7 +57,8 @@ libgallium_dri = shared_library(
driver_swrast, driver_r300, driver_r600, driver_radeonsi, driver_nouveau,
driver_kmsro, driver_v3d, driver_vc4, driver_freedreno, driver_etnaviv,
driver_tegra, driver_i915, driver_svga, driver_virgl,
driver_swr, driver_panfrost, driver_iris, driver_lima, driver_zink, driver_d3d12
driver_swr, driver_panfrost, driver_iris, driver_lima, driver_zink, driver_d3d12,
driver_asahi
],
# Will be deleted during installation, see install_megadrivers.py
install : true,
@ -105,7 +106,8 @@ foreach d : [[with_gallium_kmsro, [
[with_gallium_virgl, 'virtio_gpu_dri.so'],
[with_gallium_lima, 'lima_dri.so'],
[with_gallium_zink, 'zink_dri.so'],
[with_gallium_d3d12, 'd3d12_dri.so']]
[with_gallium_d3d12, 'd3d12_dri.so'],
[with_gallium_asahi, 'asahi_dri.so']]
if d[0]
gallium_dri_drivers += d[1]
endif

4
src/gallium/targets/libgl-xlib/meson.build
View File

@ -52,8 +52,8 @@ libgl = shared_library(
libxlib, libws_xlib, libglapi_static,
libgallium, libmesa_gallium, gallium_xlib_link_with,
],
dependencies : [dep_x11, dep_thread, dep_clock, dep_unwind, driver_swrast, driver_swr, driver_virgl],
dependencies : [dep_x11, dep_thread, dep_clock, dep_unwind, driver_swrast, driver_swr, driver_virgl, driver_asahi],
install : true,
version : '1.5.0',
darwin_versions : '4.0.0',
darwin_versions: '4.0.0',
)

2
src/meson.build
View File

@ -98,7 +98,7 @@ endif
if with_gallium_nouveau
subdir('nouveau')
endif
if with_tools.contains('asahi')
if with_gallium_asahi or with_tools.contains('asahi')
subdir('asahi')
endif
subdir('mesa')