From 07fdc0015e2d212404511b269d0a260323ebcbc0 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Tue, 4 May 2021 22:44:54 -0400 Subject: [PATCH] agx: Rename blend -> st_tile For symmetry. Signed-off-by: Alyssa Rosenzweig Part-of: --- src/asahi/compiler/agx_compile.c | 3 +-- src/asahi/compiler/agx_opcodes.py | 4 +++- src/asahi/compiler/agx_optimizer.c | 2 +- src/asahi/compiler/agx_pack.c | 2 +- 4 files changed, 6 insertions(+), 5 deletions(-) diff --git a/src/asahi/compiler/agx_compile.c b/src/asahi/compiler/agx_compile.c index 34270b2e15e..a7f4f0f09a3 100644 --- a/src/asahi/compiler/agx_compile.c +++ b/src/asahi/compiler/agx_compile.c @@ -176,8 +176,7 @@ agx_emit_fragment_out(agx_builder *b, nir_intrinsic_instr *instr) agx_writeout(b, 0xC200); agx_writeout(b, 0x000C); - /* Emit the blend op itself */ - return agx_blend(b, agx_src_index(&instr->src[0]), + return agx_st_tile(b, agx_src_index(&instr->src[0]), b->shader->key->fs.tib_formats[rt]); } diff --git a/src/asahi/compiler/agx_opcodes.py b/src/asahi/compiler/agx_opcodes.py index d7b0d866807..b2e540bf4c8 100644 --- a/src/asahi/compiler/agx_opcodes.py +++ b/src/asahi/compiler/agx_opcodes.py @@ -172,8 +172,10 @@ op("device_load", op("wait", (0x38, 0xFF, 2, _), dests = 0, can_eliminate = False, imms = [SCOREBOARD]) +op("st_tile", (0x09, 0x7F, 8, _), dests = 0, srcs = 1, + can_eliminate = False, imms = [FORMAT]) + op("bitop", (0x7E, 0x7F, 6, _), srcs = 2, imms = [TRUTH_TABLE]) -op("blend", (0x09, 0x7F, 8, _), dests = 0, srcs = 1, imms = [FORMAT], can_eliminate = False) op("convert", (0x3E | L, 0x7F | L | (0x3 << 38), 6, _), srcs = 2, imms = [ROUND]) op("ld_vary", (0x21, 0x3F, 8, _), srcs = 1, imms = [CHANNELS]) op("st_vary", None, dests = 0, srcs = 2, can_eliminate = False) diff --git a/src/asahi/compiler/agx_optimizer.c b/src/asahi/compiler/agx_optimizer.c index ac5e55f358f..0f93b19ecb0 100644 --- a/src/asahi/compiler/agx_optimizer.c +++ b/src/asahi/compiler/agx_optimizer.c @@ -169,7 +169,7 @@ agx_optimizer_forward(agx_context *ctx) agx_optimizer_fmov(defs, I, info.nr_srcs); /* Inline immediates if we can. TODO: systematic */ - if (I->op != AGX_OPCODE_ST_VARY && I->op != AGX_OPCODE_BLEND && I->op != AGX_OPCODE_P_EXTRACT && I->op != AGX_OPCODE_P_COMBINE) + if (I->op != AGX_OPCODE_ST_VARY && I->op != AGX_OPCODE_ST_TILE && I->op != AGX_OPCODE_P_EXTRACT && I->op != AGX_OPCODE_P_COMBINE) agx_optimizer_inline_imm(defs, I, info.nr_srcs, info.is_float); } diff --git a/src/asahi/compiler/agx_pack.c b/src/asahi/compiler/agx_pack.c index b5b09e0ced0..953c7af697e 100644 --- a/src/asahi/compiler/agx_pack.c +++ b/src/asahi/compiler/agx_pack.c @@ -356,7 +356,7 @@ static void agx_pack_instr(struct util_dynarray *emission, agx_instr *I) { switch (I->op) { - case AGX_OPCODE_BLEND: + case AGX_OPCODE_ST_TILE: { unsigned D = agx_pack_alu_dst(I->src[0]); unsigned rt = 0; /* TODO */