i965: Drop alignment parameter from bo_alloc_internal().
Buffers are always page aligned on 965+ hardware; I believe this extra parameter is a vestige from the Gen2-3 era. All callers pass 0, and in fact we assert that the alignment is 0 unless BO_ALLOC_BUSY is set (for some reason). We can just drop the parameter and set the value to 0 explicitly. Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
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@ -269,7 +269,7 @@ bo_alloc_internal(struct brw_bufmgr *bufmgr,
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uint64_t size,
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unsigned flags,
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uint32_t tiling_mode,
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uint32_t stride, uint64_t alignment)
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uint32_t stride)
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{
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struct brw_bo *bo;
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unsigned int page_size = getpagesize();
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@ -320,9 +320,8 @@ retry:
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bo = LIST_ENTRY(struct brw_bo, bucket->head.prev, head);
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list_del(&bo->head);
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alloc_from_cache = true;
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bo->align = alignment;
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bo->align = 0;
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} else {
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assert(alignment == 0);
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/* For non-render-target BOs (where we're probably
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* going to map it first thing in order to fill it
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* with data), check if the last BO in the cache is
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@ -382,7 +381,7 @@ retry:
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bo->gem_handle = create.handle;
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bo->bufmgr = bufmgr;
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bo->align = alignment;
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bo->align = 0;
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bo->tiling_mode = I915_TILING_NONE;
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bo->swizzle_mode = I915_BIT_6_SWIZZLE_NONE;
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@ -431,7 +430,7 @@ struct brw_bo *
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brw_bo_alloc(struct brw_bufmgr *bufmgr,
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const char *name, uint64_t size, uint64_t alignment)
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{
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return bo_alloc_internal(bufmgr, name, size, 0, I915_TILING_NONE, 0, 0);
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return bo_alloc_internal(bufmgr, name, size, 0, I915_TILING_NONE, 0);
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}
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struct brw_bo *
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@ -439,7 +438,7 @@ brw_bo_alloc_tiled(struct brw_bufmgr *bufmgr, const char *name,
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uint64_t size, uint32_t tiling_mode, uint32_t pitch,
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unsigned flags)
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{
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return bo_alloc_internal(bufmgr, name, size, flags, tiling_mode, pitch, 0);
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return bo_alloc_internal(bufmgr, name, size, flags, tiling_mode, pitch);
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}
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struct brw_bo *
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@ -480,7 +479,7 @@ brw_bo_alloc_tiled_2d(struct brw_bufmgr *bufmgr, const char *name,
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if (tiling == I915_TILING_NONE)
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stride = 0;
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return bo_alloc_internal(bufmgr, name, size, flags, tiling, stride, 0);
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return bo_alloc_internal(bufmgr, name, size, flags, tiling, stride);
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}
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/**
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