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i965: Fix render target read domains. 

We were asking for something illegal (write_domain != 0 && read_domains !=
write_domain) because at the time of writing the region surfaces were used
for texturing occasionally as well, and we weren't really clear on the model
GEM was going to use.

This reliably triggered a kernel bug with domain handling, resulting in
oglconform mustpass.c failure.  Of course, it only became visible after
01bc4d441f cleaned up some gratuitous flushing.
This commit is contained in:
Eric Anholt 2009-02-19 13:53:46 -08:00
parent 776971218e
commit 078e8a61b2
1 changed files with 1 additions and 2 deletions
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3
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
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@ -389,8 +389,7 @@ brw_update_region_surface(struct brw_context *brw, struct intel_region *region,
* a more restrictive relocation to emit.
*/
dri_bo_emit_reloc(brw->wm.surf_bo[unit],
I915_GEM_DOMAIN_RENDER |
I915_GEM_DOMAIN_SAMPLER,
I915_GEM_DOMAIN_RENDER,
I915_GEM_DOMAIN_RENDER,
0,
offsetof(struct brw_surface_state, ss1),