intel/isl: Require ISL_AUX_USAGE_HIZ_CCS_WT for HZ+CCS WT mode
We also delete the badly named isl_surf_supports_hiz_ccs_wt. The name is misleading because it doesn't return whether or not the surface supports HiZ+CCS in write-through mode (any single-sampled HiZ+CCS capable surface does) but rather a heuristic decision about whether or not we want to enable write-through mode based on the usage flags in the isl_surf. Reviewed-by: Nanley Chery <nanley.g.chery@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
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@ -2717,16 +2717,6 @@ isl_surf_get_depth_format(const struct isl_device *dev,
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}
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}
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bool
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isl_surf_supports_hiz_ccs_wt(const struct gen_device_info *dev,
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const struct isl_surf *surf,
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enum isl_aux_usage aux_usage)
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{
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return aux_usage == ISL_AUX_USAGE_HIZ_CCS &&
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surf->samples == 1 &&
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surf->usage & ISL_SURF_USAGE_TEXTURE_BIT;
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}
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bool
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isl_swizzle_supports_rendering(const struct gen_device_info *devinfo,
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struct isl_swizzle swizzle)
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@ -2287,14 +2287,6 @@ uint32_t
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isl_surf_get_depth_format(const struct isl_device *dev,
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const struct isl_surf *surf);
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/**
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* @brief determines if a surface supports writing through HIZ to the CCS.
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*/
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bool
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isl_surf_supports_hiz_ccs_wt(const struct gen_device_info *dev,
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const struct isl_surf *surf,
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enum isl_aux_usage aux_usage);
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/**
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* @brief performs a copy from linear to tiled surface
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*
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@ -213,8 +213,6 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch,
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hiz.SurfacePitch = info->hiz_surf->row_pitch_B - 1;
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#if GEN_GEN >= 12
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hiz.HierarchicalDepthBufferWriteThruEnable =
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isl_surf_supports_hiz_ccs_wt(dev->info, info->depth_surf,
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info->hiz_usage) ||
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info->hiz_usage == ISL_AUX_USAGE_HIZ_CCS_WT;
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/* The bspec docs for this bit are fairly unclear about exactly what is
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@ -582,6 +582,9 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state,
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*/
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assert(!(info->view->usage & ISL_SURF_USAGE_STORAGE_BIT));
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if (isl_surf_usage_is_depth(info->surf->usage))
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assert(isl_aux_usage_has_hiz(info->aux_usage));
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if (isl_aux_usage_has_hiz(info->aux_usage)) {
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/* For Gen8-10, there are some restrictions around sampling from HiZ.
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* The Skylake PRM docs for RENDER_SURFACE_STATE::AuxiliarySurfaceMode
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