i965: perf: make revision variable available
This will be used in the next commit to build up register programming. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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@ -1087,6 +1087,7 @@ struct brw_context
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uint64_t subslice_mask; /** $SubsliceMask */
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uint64_t gt_min_freq; /** $GpuMinFrequency */
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uint64_t gt_max_freq; /** $GpuMaxFrequency */
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uint64_t revision; /** $SkuRevisionId */
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} sys_vars;
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/* OA metric sets, indexed by GUID, as know by Mesa at build time,
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@ -175,6 +175,7 @@ hw_vars["$SubsliceMask"] = "brw->perfquery.sys_vars.subslice_mask"
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hw_vars["$GpuTimestampFrequency"] = "brw->perfquery.sys_vars.timestamp_frequency"
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hw_vars["$GpuMinFrequency"] = "brw->perfquery.sys_vars.gt_min_freq"
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hw_vars["$GpuMaxFrequency"] = "brw->perfquery.sys_vars.gt_max_freq"
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hw_vars["$SkuRevisionId"] = "brw->perfquery.sys_vars.revision"
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def output_rpn_equation_code(set, counter, equation, counter_vars):
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c("/* RPN equation: " + equation + " */")
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@ -1812,6 +1812,7 @@ init_oa_sys_vars(struct brw_context *brw, const char *sysfs_dev_dir)
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{
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const struct gen_device_info *devinfo = &brw->screen->devinfo;
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uint64_t min_freq_mhz = 0, max_freq_mhz = 0;
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__DRIscreen *screen = brw->screen->driScrnPriv;
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if (!read_sysfs_drm_device_file_uint64(brw, sysfs_dev_dir,
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"gt_min_freq_mhz",
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@ -1826,6 +1827,8 @@ init_oa_sys_vars(struct brw_context *brw, const char *sysfs_dev_dir)
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brw->perfquery.sys_vars.gt_min_freq = min_freq_mhz * 1000000;
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brw->perfquery.sys_vars.gt_max_freq = max_freq_mhz * 1000000;
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brw->perfquery.sys_vars.timestamp_frequency = devinfo->timestamp_frequency;
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brw->perfquery.sys_vars.revision = intel_device_get_revision(screen->fd);
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brw->perfquery.sys_vars.n_eu_slices = devinfo->num_slices;
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/* Assuming uniform distribution of subslices per slices. */
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brw->perfquery.sys_vars.n_eu_sub_slices = devinfo->num_subslices[0];
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@ -1848,7 +1851,6 @@ init_oa_sys_vars(struct brw_context *brw, const char *sysfs_dev_dir)
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} else
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unreachable("not reached");
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} else {
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__DRIscreen *screen = brw->screen->driScrnPriv;
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drm_i915_getparam_t gp;
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int ret;
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int slice_mask = 0;
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@ -2129,14 +2129,9 @@ set_max_gl_versions(struct intel_screen *screen)
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/**
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* Return the revision (generally the revid field of the PCI header) of the
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* graphics device.
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*
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* XXX: This function is useful to keep around even if it is not currently in
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* use. It is necessary for new platforms and revision specific workarounds or
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* features. Please don't remove it so that we know it at least continues to
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* build.
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*/
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static __attribute__((__unused__)) int
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brw_get_revision(int fd)
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int
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intel_device_get_revision(int fd)
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{
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struct drm_i915_getparam gp;
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int revision;
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@ -136,6 +136,9 @@ double get_time(void);
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const int*
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intel_supported_msaa_modes(const struct intel_screen *screen);
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int
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intel_device_get_revision(int fd);
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static inline bool
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can_do_pipelined_register_writes(const struct intel_screen *screen)
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{
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