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intel/compiler: Do not reswizzle dst if instruction writes to flag register 

If we write to the flag register changing the swizzle would change
what channels are written to the flag register.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110201
Fixes: 4cd1a0be
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: <ian.d.romanick@intel.com>
This commit is contained in:
Danylo Piliaiev 2019-03-25 14:15:27 +02:00 committed by Lionel Landwerlin
parent 9b2473c7a4
commit 04508f57d1
1 changed files with 6 additions and 0 deletions
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6
src/intel/compiler/brw_vec4.cpp
View File

@ -1154,6 +1154,12 @@ vec4_instruction::can_reswizzle(const struct gen_device_info *devinfo,
if (devinfo->gen == 6 && is_math() && swizzle != BRW_SWIZZLE_XYZW)
return false;
/* If we write to the flag register changing the swizzle would change
* what channels are written to the flag register.
*/
if (writes_flag())
return false;
/* We can't swizzle implicit accumulator access. We'd have to
* reswizzle the producer of the accumulator value in addition
* to the consumer (i.e. both MUL and MACH). Just skip this.