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radeonsi: decrease the maximum variable block size 

to allow packing the block size in 1 user SGPR with 10 bits per component,
so that block sizes such as 512x1x1 fit in there.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9795>
This commit is contained in:
Marek Olšák 2021-03-21 19:57:09 -04:00 committed by Marge Bot
parent ad71ef9326
commit 034c1e4845
1 changed files with 3 additions and 1 deletions
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4
src/gallium/drivers/radeonsi/si_pipe.h
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@ -113,7 +113,9 @@ extern "C" {
#define SI_MAX_VIEWPORTS 16
#define SIX_BITS 0x3F
#define SI_MAP_BUFFER_ALIGNMENT 64
#define SI_MAX_VARIABLE_THREADS_PER_BLOCK 1024
/* We only support the minimum allowed value (512), so that we can pack a 3D block size
* in 1 SGPR. */
#define SI_MAX_VARIABLE_THREADS_PER_BLOCK 512
#define SI_CONTEXT_FLAG_AUX (1u << 31)