pan/midgard: Correct issues in disassemble.c
cppcheck. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
This commit is contained in:
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23376c2d35
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032e21b33e
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@ -62,7 +62,7 @@ print_tag_short(unsigned tag)
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break;
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case midgard_word_type_alu:
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printf("alu%d/%X", midgard_word_size[tag], tag);
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printf("alu%u/%X", midgard_word_size[tag], tag);
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break;
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default:
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@ -241,7 +241,7 @@ print_swizzle_vec16(unsigned swizzle, bool rep_high, bool rep_low,
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print_swizzle_helper_8(swizzle, false);
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} else {
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print_swizzle_helper_8(swizzle, rep_high & 1);
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print_swizzle_helper_8(swizzle, !rep_low & 1);
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print_swizzle_helper_8(swizzle, !(rep_low & 1));
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}
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}
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@ -251,7 +251,7 @@ print_swizzle_vec8(unsigned swizzle, bool rep_high, bool rep_low)
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printf(".");
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print_swizzle_helper(swizzle, rep_high & 1);
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print_swizzle_helper(swizzle, !rep_low & 1);
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print_swizzle_helper(swizzle, !(rep_low & 1));
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}
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static void
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@ -364,7 +364,7 @@ print_vector_src(unsigned src_binary,
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/* Since we wrapped with a function-looking thing */
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if (is_int && int_mod == midgard_int_shift)
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printf(") << %d", bits);
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printf(") << %u", bits);
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else if ((is_int && (int_mod != midgard_int_normal))
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|| (!is_int && src->mod & MIDGARD_FLOAT_MOD_ABS))
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printf(")");
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@ -384,7 +384,7 @@ static void
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print_immediate(uint16_t imm)
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{
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if (is_instruction_int)
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printf("#%d", imm);
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printf("#%u", imm);
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else
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printf("#%g", _mesa_half_to_float(imm));
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}
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@ -460,7 +460,7 @@ print_mask(uint8_t mask, unsigned bits, midgard_dest_override override)
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/* Shouldn't happen but with junk / out-of-spec shaders it
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* would cause an infinite loop */
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printf("/* XXX: bits = %d */", bits);
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printf("/* XXX: bits = %u */", bits);
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return;
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}
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@ -574,7 +574,7 @@ print_vector_field(const char *name, uint16_t *words, uint16_t reg_word,
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bool known = override != 0x3; /* Unused value */
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if (!(modeable && known))
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printf("/* do%d */ ", override);
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printf("/* do%u */ ", override);
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}
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print_mask(mask, dest_size, override);
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@ -681,7 +681,7 @@ print_scalar_field(const char *name, uint16_t *words, uint16_t reg_word,
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}
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static void
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print_branch_op(int op)
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print_branch_op(unsigned op)
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{
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switch (op) {
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case midgard_jmp_writeout_op_branch_uncond:
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@ -705,7 +705,7 @@ print_branch_op(int op)
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break;
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default:
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printf("unk%d.", op);
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printf("unk%u.", op);
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break;
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}
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}
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@ -748,7 +748,7 @@ print_compact_branch_writeout_field(uint16_t word)
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printf("br.uncond ");
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if (br_uncond.unknown != 1)
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printf("unknown:%d, ", br_uncond.unknown);
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printf("unknown:%u, ", br_uncond.unknown);
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if (br_uncond.offset >= 0)
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printf("+");
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@ -812,7 +812,7 @@ print_extended_branch_writeout_field(uint8_t *words)
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printf("lut%X", br.cond);
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if (br.unknown)
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printf(".unknown%d", br.unknown);
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printf(".unknown%u", br.unknown);
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printf(" ");
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@ -916,7 +916,6 @@ print_alu_word(uint32_t *words, unsigned num_quad_words,
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if ((control_word >> 25) & 1) {
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print_vector_field("lut", word_ptr, *beginning_ptr, tabs);
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beginning_ptr += 1;
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word_ptr += 3;
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num_words += 3;
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}
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@ -1007,7 +1006,7 @@ print_varying_parameters(midgard_load_store_word *word)
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}
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if (param.zero0 || param.zero1 || param.zero2)
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printf(" /* zero tripped, %d %d %d */ ", param.zero0, param.zero1, param.zero2);
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printf(" /* zero tripped, %u %u %u */ ", param.zero0, param.zero1, param.zero2);
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}
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static bool
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@ -1060,14 +1059,14 @@ print_load_store_arg(uint8_t arg, unsigned index)
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unsigned reg = REGISTER_LDST_BASE + sel.select;
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char comp = components[sel.component];
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printf("r%d.%c", reg, comp);
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printf("r%u.%c", reg, comp);
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/* Only print a shift if it's non-zero. Shifts only make sense for the
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* second index. For the first, we're not sure what it means yet */
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if (index == 1) {
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if (sel.shift)
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printf(" << %d", sel.shift);
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printf(" << %u", sel.shift);
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} else {
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printf(" /* %X */", sel.shift);
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}
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@ -1106,7 +1105,7 @@ print_load_store_instr(uint64_t data,
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midg_stats.attribute_count = -16;
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}
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printf(" r%d", word->reg);
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printf(" r%u", word->reg);
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print_mask_4(word->mask);
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if (!OP_IS_STORE(word->op))
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@ -1124,14 +1123,14 @@ print_load_store_instr(uint64_t data,
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address = (hi << 3) | lo;
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}
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printf(", %d", address);
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printf(", %u", address);
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print_swizzle_vec4(word->swizzle, false, false);
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printf(", ");
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if (is_ubo) {
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printf("ubo%d", word->arg_1);
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printf("ubo%u", word->arg_1);
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update_stats(&midg_stats.uniform_buffer_count, word->arg_1);
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} else
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print_load_store_arg(word->arg_1, 0);
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@ -1189,7 +1188,7 @@ print_texture_reg_select(uint8_t u)
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if (!sel.full)
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printf("h");
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printf("r%d", REG_TEX_BASE + sel.select);
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printf("r%u", REG_TEX_BASE + sel.select);
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unsigned component = sel.component;
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@ -1249,7 +1248,7 @@ print_texture_op(unsigned op, bool gather)
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unsigned bottom = op & 0xF;
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if (bottom != 0x2)
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printf("_unk%d", bottom);
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printf("_unk%u", bottom);
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printf(".%c", components[component]);
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return;
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@ -1337,7 +1336,7 @@ print_texture_word(uint32_t *word, unsigned tabs)
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/* Indirect, tut tut */
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midg_stats.texture_count = -16;
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} else {
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printf("texture%d, ", texture->texture_handle);
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printf("texture%u, ", texture->texture_handle);
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update_stats(&midg_stats.texture_count, texture->texture_handle);
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}
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@ -1351,7 +1350,7 @@ print_texture_word(uint32_t *word, unsigned tabs)
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midg_stats.sampler_count = -16;
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} else {
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printf("%d", texture->sampler_handle);
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printf("%u", texture->sampler_handle);
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update_stats(&midg_stats.sampler_count, texture->sampler_handle);
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}
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@ -1431,7 +1430,7 @@ print_texture_word(uint32_t *word, unsigned tabs)
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if (texture->bias_int)
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printf(" /* bias_int = 0x%X */ ", texture->bias_int);
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printf("lod = %d, ", texture->bias);
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printf("lod = %u, ", texture->bias);
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} else if (texture->bias || texture->bias_int) {
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signed bias_int = texture->bias_int;
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float bias_frac = texture->bias / 256.0f;
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