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freedreno/ir3: fix mad 3rd src delay calc 

In fad158a0 ("freedreno/ir3: array rework") the src # (n) shifted by
one, but missed updating delay-slot calc.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
This commit is contained in:
Rob Clark 2016-01-17 12:21:45 -05:00
parent 2a6ec1e061
commit 02ac91d717
1 changed files with 1 additions and 1 deletions
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2
src/gallium/drivers/freedreno/ir3/ir3_depth.c
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@ -76,7 +76,7 @@ int ir3_delayslots(struct ir3_instruction *assigner,
return 6;
} else if ((consumer->category == 3) &&
(is_mad(consumer->opc) || is_madsh(consumer->opc)) &&
(n == 2)) {
(n == 3)) {
/* special case, 3rd src to cat3 not required on first cycle */
return 1;
} else {