panfrost: Avoid reading GPU memory when packing vertices
These occurred unintentionally as a byproduct of bitfields, etc. Whoops. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3838>
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@ -359,15 +359,6 @@ panfrost_default_shader_backend(struct panfrost_context *ctx)
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memcpy(&ctx->fragment_shader_core, &shader, sizeof(shader));
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}
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mali_ptr
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panfrost_vertex_buffer_address(struct panfrost_context *ctx, unsigned i)
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{
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struct pipe_vertex_buffer *buf = &ctx->vertex_buffers[i];
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struct panfrost_resource *rsrc = (struct panfrost_resource *) (buf->buffer.resource);
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return rsrc->bo->gpu + buf->buffer_offset;
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}
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static bool
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panfrost_writes_point_size(struct panfrost_context *ctx)
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{
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@ -419,25 +410,35 @@ panfrost_stage_attributes(struct panfrost_context *ctx)
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for (unsigned i = 0; i < so->num_elements; ++i) {
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unsigned vbi = so->pipe[i].vertex_buffer_index;
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struct pipe_vertex_buffer *buf = &ctx->vertex_buffers[vbi];
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mali_ptr addr = panfrost_vertex_buffer_address(ctx, vbi);
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struct panfrost_resource *rsrc = (struct panfrost_resource *) (buf->buffer.resource);
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mali_ptr addr = rsrc->bo->gpu + buf->buffer_offset;
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/* Adjust by the masked off bits of the offset */
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target[i].src_offset += (addr & 63);
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/* Adjust by the masked off bits of the offset. Make sure we
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* read src_offset from so->hw (which is not GPU visible)
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* rather than target (which is) due to caching effects */
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unsigned src_offset = so->hw[i].src_offset;
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src_offset += (addr & 63);
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/* Also, somewhat obscurely per-instance data needs to be
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* offset in response to a delayed start in an indexed draw */
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if (so->pipe[i].instance_divisor && ctx->instance_count > 1 && start)
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target[i].src_offset -= buf->stride * start;
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src_offset -= buf->stride * start;
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target[i].src_offset = src_offset;
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}
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/* Let's also include vertex builtins */
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target[PAN_VERTEX_ID].format = MALI_R32UI;
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target[PAN_VERTEX_ID].swizzle = panfrost_get_default_swizzle(1);
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struct mali_attr_meta builtin = {
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.format = MALI_R32UI,
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.swizzle = panfrost_get_default_swizzle(1)
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};
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target[PAN_INSTANCE_ID].format = MALI_R32UI;
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target[PAN_INSTANCE_ID].swizzle = panfrost_get_default_swizzle(1);
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/* See mali_attr_meta specification for the magic number */
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memcpy(&target[PAN_VERTEX_ID], &builtin, 4);
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memcpy(&target[PAN_INSTANCE_ID], &builtin, 4);
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ctx->payloads[PIPE_SHADER_VERTEX].postfix.attribute_meta = transfer.gpu;
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}
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