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i965: Fix stencil write enable flag in 3DSTATE_DEPTH_BUFFER on Gen7+. 

ctx->Stencil.WriteMask is a statically sized array of 3 elements.
Checking it against 0 actually is a NULL check, and can never fail,
which meant that we always said stencil writes were enabled.

Use the new core Mesa derived state flag to fix this.

NOTE: This is a candidate for stable branches.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
This commit is contained in:
Kenneth Graunke 2013-04-02 10:29:37 -07:00
parent 1e3235d36e
commit 01bd29d681
1 changed files with 1 additions and 1 deletions
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2
src/mesa/drivers/dri/i965/gen7_misc_state.c
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@ -50,7 +50,7 @@ gen7_emit_depth_stencil_hiz(struct brw_context *brw,
OUT_BATCH((depth_mt ? depth_mt->region->pitch - 1 : 0) |
(depthbuffer_format << 18) |
((hiz_mt ? 1 : 0) << 22) |
((stencil_mt != NULL && ctx->Stencil.WriteMask != 0) << 27) |
((stencil_mt != NULL && ctx->Stencil._WriteEnabled) << 27) |
((ctx->Depth.Mask != 0) << 28) |
(depth_surface_type << 29));