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intel/genxml: Add register for object preemption. 

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Rafael Antognolli 2018-10-29 10:19:52 -07:00
parent a6b7d1151c
commit 019a92ffa4
3 changed files with 24 additions and 0 deletions
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8
src/intel/genxml/gen10.xml
View File

@ -3542,6 +3542,14 @@
<field name="All Allocation" start="25" end="31" type="uint"/>
</register>
<register name="CS_CHICKEN1" length="1" num="0x2580">
<field name="Replay Mode" start="0" end="0" type="uint">
<value name="Mid-cmdbuffer Preemption" value="0"/>
<value name="Object Level Preemption" value="1"/>
</field>
<field name="Replay Mode Mask" start="16" end="16" type="bool"/>
</register>
<register name="SO_WRITE_OFFSET0" length="1" num="0x5280">
<field name="Write Offset" start="2" end="31" type="offset"/>
</register>

8
src/intel/genxml/gen11.xml
View File

@ -3542,6 +3542,14 @@
<field name="All Allocation" start="25" end="31" type="uint"/>
</register>
<register name="CS_CHICKEN1" length="1" num="0x2580">
<field name="Replay Mode" start="0" end="0" type="uint">
<value name="Mid-cmdbuffer Preemption" value="0"/>
<value name="Object Level Preemption" value="1"/>
</field>
<field name="Replay Mode Mask" start="16" end="16" type="bool"/>
</register>
<register name="SO_WRITE_OFFSET0" length="1" num="0x5280">
<field name="Write Offset" start="2" end="31" type="offset"/>
</register>

8
src/intel/genxml/gen9.xml
View File

@ -3480,6 +3480,14 @@
<field name="All Allocation" start="25" end="31" type="uint"/>
</register>
<register name="CS_CHICKEN1" length="1" num="0x2580">
<field name="Replay Mode" start="0" end="0" type="uint">
<value name="Mid-cmdbuffer Preemption" value="0"/>
<value name="Object Level Preemption" value="1"/>
</field>
<field name="Replay Mode Mask" start="16" end="16" type="bool"/>
</register>
<register name="SO_WRITE_OFFSET0" length="1" num="0x5280">
<field name="Write Offset" start="2" end="31" type="offset"/>
</register>