gallium: renumber PIPE_MAP_* enums to remove holes
We could change the type into 16 bits if needed. PB_USAGE flags need to match PIPE_MAP flags due to static assertions. Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10527>
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@ -64,13 +64,13 @@ enum pb_usage_flags {
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PB_USAGE_CPU_WRITE = (1 << 1),
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PB_USAGE_GPU_READ = (1 << 2),
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PB_USAGE_GPU_WRITE = (1 << 3),
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PB_USAGE_DONTBLOCK = (1 << 9),
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PB_USAGE_UNSYNCHRONIZED = (1 << 10),
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PB_USAGE_DONTBLOCK = (1 << 4),
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PB_USAGE_UNSYNCHRONIZED = (1 << 5),
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/* Persistent mappings may remain across a flush. Note that contrary
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* to OpenGL persistent maps, there is no requirement at the pipebuffer
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* api level to explicitly enforce coherency by barriers or range flushes.
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*/
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PB_USAGE_PERSISTENT = (1 << 13)
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PB_USAGE_PERSISTENT = (1 << 8)
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};
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/* For error checking elsewhere */
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@ -298,8 +298,8 @@ void iris_bo_unreference(struct iris_bo *bo);
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#define MAP_PERSISTENT PIPE_MAP_PERSISTENT
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#define MAP_COHERENT PIPE_MAP_COHERENT
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/* internal */
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#define MAP_INTERNAL_MASK (0xffu << 24)
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#define MAP_RAW (0x01 << 24)
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#define MAP_RAW (PIPE_MAP_DRV_PRV << 0)
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#define MAP_INTERNAL_MASK (MAP_RAW)
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#define MAP_FLAGS (MAP_READ | MAP_WRITE | MAP_ASYNC | \
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MAP_PERSISTENT | MAP_COHERENT | MAP_INTERNAL_MASK)
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@ -246,13 +246,13 @@ enum pipe_map_flags
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* Resource contents read back (or accessed directly) at transfer
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* create time.
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*/
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PIPE_MAP_READ = (1 << 0),
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PIPE_MAP_READ = 1 << 0,
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/**
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* Resource contents will be written back at transfer_unmap
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* time (or modified as a result of being accessed directly).
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*/
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PIPE_MAP_WRITE = (1 << 1),
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PIPE_MAP_WRITE = 1 << 1,
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/**
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* Read/modify/write
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@ -270,7 +270,7 @@ enum pipe_map_flags
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*
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* This flag supresses implicit "DISCARD" for buffer_subdata.
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*/
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PIPE_MAP_DIRECTLY = (1 << 2),
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PIPE_MAP_DIRECTLY = 1 << 2,
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/**
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* Discards the memory within the mapped region.
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@ -280,7 +280,7 @@ enum pipe_map_flags
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* See also:
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* - OpenGL's ARB_map_buffer_range extension, MAP_INVALIDATE_RANGE_BIT flag.
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*/
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PIPE_MAP_DISCARD_RANGE = (1 << 8),
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PIPE_MAP_DISCARD_RANGE = 1 << 3,
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/**
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* Fail if the resource cannot be mapped immediately.
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@ -290,7 +290,7 @@ enum pipe_map_flags
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* - Mesa's MESA_MAP_NOWAIT_BIT flag.
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* - WDDM's D3DDDICB_LOCKFLAGS.DonotWait flag.
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*/
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PIPE_MAP_DONTBLOCK = (1 << 9),
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PIPE_MAP_DONTBLOCK = 1 << 4,
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/**
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* Do not attempt to synchronize pending operations on the resource when mapping.
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@ -302,7 +302,7 @@ enum pipe_map_flags
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* - Direct3D's D3DLOCK_NOOVERWRITE flag.
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* - WDDM's D3DDDICB_LOCKFLAGS.IgnoreSync flag.
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*/
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PIPE_MAP_UNSYNCHRONIZED = (1 << 10),
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PIPE_MAP_UNSYNCHRONIZED = 1 << 5,
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/**
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* Written ranges will be notified later with
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@ -314,7 +314,7 @@ enum pipe_map_flags
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* - pipe_context::transfer_flush_region
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* - OpenGL's ARB_map_buffer_range extension, MAP_FLUSH_EXPLICIT_BIT flag.
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*/
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PIPE_MAP_FLUSH_EXPLICIT = (1 << 11),
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PIPE_MAP_FLUSH_EXPLICIT = 1 << 6,
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/**
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* Discards all memory backing the resource.
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@ -329,7 +329,7 @@ enum pipe_map_flags
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* - D3D10 DDI's D3D10_DDI_MAP_WRITE_DISCARD flag
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* - D3D10's D3D10_MAP_WRITE_DISCARD flag.
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*/
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PIPE_MAP_DISCARD_WHOLE_RESOURCE = (1 << 12),
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PIPE_MAP_DISCARD_WHOLE_RESOURCE = 1 << 7,
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/**
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* Allows the resource to be used for rendering while mapped.
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@ -340,7 +340,7 @@ enum pipe_map_flags
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* If COHERENT is not set, memory_barrier(PIPE_BARRIER_MAPPED_BUFFER)
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* must be called to ensure the device can see what the CPU has written.
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*/
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PIPE_MAP_PERSISTENT = (1 << 13),
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PIPE_MAP_PERSISTENT = 1 << 8,
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/**
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* If PERSISTENT is set, this ensures any writes done by the device are
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@ -349,35 +349,35 @@ enum pipe_map_flags
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* PIPE_RESOURCE_FLAG_MAP_COHERENT must be set when creating
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* the resource.
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*/
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PIPE_MAP_COHERENT = (1 << 14),
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PIPE_MAP_COHERENT = 1 << 9,
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/**
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* Map a resource in a thread-safe manner, because the calling thread can
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* be any thread. It can only be used if both WRITE and UNSYNCHRONIZED are
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* set.
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*/
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PIPE_MAP_THREAD_SAFE = 1 << 15,
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PIPE_MAP_THREAD_SAFE = 1 << 10,
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/**
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* Map only the depth aspect of a resource
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*/
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PIPE_MAP_DEPTH_ONLY = 1 << 16,
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PIPE_MAP_DEPTH_ONLY = 1 << 11,
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/**
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* Map only the stencil aspect of a resource
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*/
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PIPE_MAP_STENCIL_ONLY = 1 << 17,
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PIPE_MAP_STENCIL_ONLY = 1 << 12,
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/**
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* Mapping will be used only once (never remapped).
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*/
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PIPE_MAP_ONCE = 1 << 18,
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PIPE_MAP_ONCE = 1 << 13,
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/**
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* This and higher bits are reserved for private use by drivers. Drivers
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* should use this as (PIPE_MAP_DRV_PRV << i).
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*/
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PIPE_MAP_DRV_PRV = (1 << 24)
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PIPE_MAP_DRV_PRV = 1 << 14,
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};
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/**
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