2016-12-23 19:58:23 +00:00
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/*
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* Copyright (c) 2012-2015 Etnaviv Project
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sub license,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Wladimir J. van der Laan <laanwj@gmail.com>
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*/
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#ifndef H_ETNAVIV_ASM
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#define H_ETNAVIV_ASM
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#include <stdint.h>
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2019-06-28 02:52:22 +01:00
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#include <stdbool.h>
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2019-09-11 21:59:31 +01:00
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#include "util/u_math.h"
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2016-12-23 19:58:23 +00:00
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#include "hw/isa.xml.h"
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/* Size of an instruction in 32-bit words */
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#define ETNA_INST_SIZE (4)
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/* Number of source operands per instruction */
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#define ETNA_NUM_SRC (3)
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/* Broadcast swizzle to all four components */
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#define INST_SWIZ_BROADCAST(x) \
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(INST_SWIZ_X(x) | INST_SWIZ_Y(x) | INST_SWIZ_Z(x) | INST_SWIZ_W(x))
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/* Identity (NOP) swizzle */
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#define INST_SWIZ_IDENTITY \
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(INST_SWIZ_X(0) | INST_SWIZ_Y(1) | INST_SWIZ_Z(2) | INST_SWIZ_W(3))
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/* Fully specified swizzle */
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#define INST_SWIZ(x,y,z,w) \
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(INST_SWIZ_X(x) | INST_SWIZ_Y(y) | INST_SWIZ_Z(z) | INST_SWIZ_W(w))
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#define SWIZZLE(c0,c1,c2,c3) \
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INST_SWIZ(INST_SWIZ_COMP_##c0, \
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INST_SWIZ_COMP_##c1, \
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INST_SWIZ_COMP_##c2, \
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INST_SWIZ_COMP_##c3)
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/*** operands ***/
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/* destination operand */
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struct etna_inst_dst {
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unsigned use:1; /* 0: not in use, 1: in use */
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unsigned amode:3; /* INST_AMODE_* */
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unsigned reg:7; /* register number 0..127 */
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2019-06-28 02:52:22 +01:00
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unsigned write_mask:4; /* INST_COMPS_* */
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2016-12-23 19:58:23 +00:00
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};
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/* texture operand */
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struct etna_inst_tex {
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unsigned id:5; /* sampler id */
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unsigned amode:3; /* INST_AMODE_* */
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unsigned swiz:8; /* INST_SWIZ */
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};
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/* source operand */
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struct etna_inst_src {
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unsigned use:1; /* 0: not in use, 1: in use */
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unsigned rgroup:3; /* INST_RGROUP_* */
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2019-06-28 02:52:22 +01:00
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union {
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struct __attribute__((__packed__)) {
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unsigned reg:9; /* register or uniform number 0..511 */
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unsigned swiz:8; /* INST_SWIZ */
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unsigned neg:1; /* negate (flip sign) if set */
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unsigned abs:1; /* absolute (remove sign) if set */
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unsigned amode:3; /* INST_AMODE_* */
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};
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struct __attribute__((__packed__)) {
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unsigned imm_val : 20;
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unsigned imm_type : 2;
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};
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};
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2016-12-23 19:58:23 +00:00
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};
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/*** instruction ***/
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struct etna_inst {
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uint8_t opcode; /* INST_OPCODE_* */
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uint8_t type; /* INST_TYPE_* */
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unsigned cond:5; /* INST_CONDITION_* */
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unsigned sat:1; /* saturate result between 0..1 */
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2019-06-28 02:52:22 +01:00
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unsigned sel_bit0:1; /* select low half mediump */
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unsigned sel_bit1:1; /* select high half mediump */
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unsigned dst_full:1; /* write to highp register */
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2022-04-09 18:00:12 +01:00
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unsigned no_oneconst_limit:1; /* allow multiple different uniform sources */
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2016-12-23 19:58:23 +00:00
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struct etna_inst_dst dst; /* destination operand */
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struct etna_inst_tex tex; /* texture operand */
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struct etna_inst_src src[ETNA_NUM_SRC]; /* source operand */
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unsigned imm; /* takes place of src[2] for BRANCH/CALL */
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};
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/* Compose two swizzles (computes swz1.swz2) */
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static inline uint32_t inst_swiz_compose(uint32_t swz1, uint32_t swz2)
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{
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return INST_SWIZ_X((swz1 >> (((swz2 >> 0)&3)*2))&3) |
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INST_SWIZ_Y((swz1 >> (((swz2 >> 2)&3)*2))&3) |
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INST_SWIZ_Z((swz1 >> (((swz2 >> 4)&3)*2))&3) |
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INST_SWIZ_W((swz1 >> (((swz2 >> 6)&3)*2))&3);
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};
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2019-06-28 02:52:22 +01:00
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/* Compose two write_masks (computes wm1.wm2) */
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static inline uint32_t inst_write_mask_compose(uint32_t wm1, uint32_t wm2)
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{
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unsigned wm = 0;
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for (unsigned i = 0, j = 0; i < 4; i++) {
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if (wm2 & (1 << i)) {
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if (wm1 & (1 << j))
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wm |= (1 << i);
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j++;
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}
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}
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return wm;
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};
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2016-12-23 19:58:23 +00:00
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/* Return whether the rgroup is one of the uniforms */
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static inline int
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etna_rgroup_is_uniform(unsigned rgroup)
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{
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return rgroup == INST_RGROUP_UNIFORM_0 ||
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rgroup == INST_RGROUP_UNIFORM_1;
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}
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2019-06-28 02:52:22 +01:00
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static inline struct etna_inst_src
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etna_immediate_src(unsigned type, uint32_t bits)
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{
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return (struct etna_inst_src) {
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.use = 1,
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.rgroup = INST_RGROUP_IMMEDIATE,
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.imm_val = bits,
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.imm_type = type
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};
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}
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2019-09-11 21:59:31 +01:00
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static inline struct etna_inst_src
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etna_immediate_float(float x)
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{
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uint32_t bits = fui(x);
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2019-09-29 22:27:24 +01:00
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assert((bits & 0xfff) == 0); /* 12 lsb cut off */
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2019-09-11 21:59:31 +01:00
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return etna_immediate_src(0, bits >> 12);
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}
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static inline struct etna_inst_src
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etna_immediate_int(int x)
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{
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assert(x >= -0x80000 && x < 0x80000); /* 20-bit signed int */
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return etna_immediate_src(1, x);
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}
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2016-12-23 19:58:23 +00:00
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/**
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* Build vivante instruction from structure with
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* opcode, cond, sat, dst_use, dst_amode,
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* dst_reg, dst_comps, tex_id, tex_amode, tex_swiz,
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* src[0-2]_reg, use, swiz, neg, abs, amode, rgroup,
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* imm
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*
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* Return 0 if successful, and a non-zero
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* value otherwise.
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*/
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int
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etna_assemble(uint32_t *out, const struct etna_inst *inst);
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/**
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* Set field imm of already-assembled instruction.
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* This is used for filling in jump destinations in a separate pass.
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*/
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static inline void
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etna_assemble_set_imm(uint32_t *out, uint32_t imm)
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{
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out[3] |= VIV_ISA_WORD_3_SRC2_IMM(imm);
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}
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#endif
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