2015-03-31 22:03:39 +01:00
|
|
|
/*
|
|
|
|
* Copyright © 2015 Red Hat
|
|
|
|
*
|
|
|
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
* copy of this software and associated documentation files (the "Software"),
|
|
|
|
* to deal in the Software without restriction, including without limitation
|
|
|
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
* and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
* Software is furnished to do so, subject to the following conditions:
|
|
|
|
*
|
|
|
|
* The above copyright notice and this permission notice (including the next
|
|
|
|
* paragraph) shall be included in all copies or substantial portions of the
|
|
|
|
* Software.
|
|
|
|
*
|
|
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
|
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
|
|
|
|
* IN THE SOFTWARE.
|
|
|
|
*
|
|
|
|
* Authors:
|
|
|
|
* Rob Clark <robclark@freedesktop.org>
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include "nir.h"
|
|
|
|
#include "nir_builder.h"
|
|
|
|
|
|
|
|
/* Lowers idiv/udiv/umod
|
|
|
|
* Based on NV50LegalizeSSA::handleDIV()
|
|
|
|
*
|
|
|
|
* Note that this is probably not enough precision for compute shaders.
|
|
|
|
* Perhaps we want a second higher precision (looping) version of this?
|
|
|
|
* Or perhaps we assume if you can do compute shaders you can also
|
|
|
|
* branch out to a pre-optimized shader library routine..
|
|
|
|
*/
|
|
|
|
|
2016-05-09 17:36:03 +01:00
|
|
|
static bool
|
2015-03-31 22:03:39 +01:00
|
|
|
convert_instr(nir_builder *bld, nir_alu_instr *alu)
|
|
|
|
{
|
|
|
|
nir_ssa_def *numer, *denom, *af, *bf, *a, *b, *q, *r;
|
|
|
|
nir_op op = alu->op;
|
|
|
|
bool is_signed;
|
|
|
|
|
|
|
|
if ((op != nir_op_idiv) &&
|
|
|
|
(op != nir_op_udiv) &&
|
|
|
|
(op != nir_op_umod))
|
2016-05-09 17:36:03 +01:00
|
|
|
return false;
|
2015-03-31 22:03:39 +01:00
|
|
|
|
|
|
|
is_signed = (op == nir_op_idiv);
|
|
|
|
|
2015-08-06 15:16:07 +01:00
|
|
|
bld->cursor = nir_before_instr(&alu->instr);
|
2015-03-31 22:03:39 +01:00
|
|
|
|
nir: add nir_ssa_for_alu_src()
Using something like:
numer = nir_ssa_for_src(bld, alu->src[0].src,
nir_ssa_alu_instr_src_components(alu, 0));
for alu src's with swizzle, like:
vec1 ssa_10 = intrinsic load_uniform () () (0, 0)
vec2 ssa_11 = intrinsic load_uniform () () (1, 0)
vec2 ssa_2 = udiv ssa_10.xx, ssa_11
ends up turning into something like:
vec1 ssa_10 = intrinsic load_uniform () () (0, 0)
vec2 ssa_11 = intrinsic load_uniform () () (1, 0)
vec2 ssa_13 = imov ssa_10
...
because nir_ssa_for_src() ignore's the original nir_alu_src's swizzle.
Instead for alu instructions, nir_src_for_alu_src() should be used to
ensure the original alu src's swizzle doesn't get lost in translation:
vec1 ssa_10 = intrinsic load_uniform () () (0, 0)
vec2 ssa_11 = intrinsic load_uniform () () (1, 0)
vec2 ssa_13 = imov ssa_10.xx
...
v2: check for abs/neg, and re-use existing nir_alu_src
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-11-05 15:23:48 +00:00
|
|
|
numer = nir_ssa_for_alu_src(bld, alu, 0);
|
|
|
|
denom = nir_ssa_for_alu_src(bld, alu, 1);
|
2015-03-31 22:03:39 +01:00
|
|
|
|
|
|
|
if (is_signed) {
|
2017-03-08 03:54:37 +00:00
|
|
|
af = nir_i2f32(bld, numer);
|
|
|
|
bf = nir_i2f32(bld, denom);
|
2015-03-31 22:03:39 +01:00
|
|
|
af = nir_fabs(bld, af);
|
|
|
|
bf = nir_fabs(bld, bf);
|
|
|
|
a = nir_iabs(bld, numer);
|
|
|
|
b = nir_iabs(bld, denom);
|
|
|
|
} else {
|
2017-03-08 03:54:37 +00:00
|
|
|
af = nir_u2f32(bld, numer);
|
|
|
|
bf = nir_u2f32(bld, denom);
|
2015-03-31 22:03:39 +01:00
|
|
|
a = numer;
|
|
|
|
b = denom;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* get first result: */
|
|
|
|
bf = nir_frcp(bld, bf);
|
|
|
|
bf = nir_isub(bld, bf, nir_imm_int(bld, 2)); /* yes, really */
|
|
|
|
q = nir_fmul(bld, af, bf);
|
|
|
|
|
|
|
|
if (is_signed) {
|
2017-03-08 03:54:37 +00:00
|
|
|
q = nir_f2i32(bld, q);
|
2015-03-31 22:03:39 +01:00
|
|
|
} else {
|
2017-03-08 03:54:37 +00:00
|
|
|
q = nir_f2u32(bld, q);
|
2015-03-31 22:03:39 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
/* get error of first result: */
|
|
|
|
r = nir_imul(bld, q, b);
|
|
|
|
r = nir_isub(bld, a, r);
|
2017-03-08 03:54:37 +00:00
|
|
|
r = nir_u2f32(bld, r);
|
2015-03-31 22:03:39 +01:00
|
|
|
r = nir_fmul(bld, r, bf);
|
2017-03-08 03:54:37 +00:00
|
|
|
r = nir_f2u32(bld, r);
|
2015-03-31 22:03:39 +01:00
|
|
|
|
|
|
|
/* add quotients: */
|
|
|
|
q = nir_iadd(bld, q, r);
|
|
|
|
|
|
|
|
/* correction: if modulus >= divisor, add 1 */
|
|
|
|
r = nir_imul(bld, q, b);
|
|
|
|
r = nir_isub(bld, a, r);
|
|
|
|
|
2015-11-08 18:43:07 +00:00
|
|
|
r = nir_uge(bld, r, b);
|
2018-11-07 19:43:40 +00:00
|
|
|
r = nir_b2i32(bld, r);
|
2015-03-31 22:03:39 +01:00
|
|
|
|
|
|
|
q = nir_iadd(bld, q, r);
|
|
|
|
if (is_signed) {
|
|
|
|
/* fix the sign: */
|
|
|
|
r = nir_ixor(bld, numer, denom);
|
2018-12-16 06:42:01 +00:00
|
|
|
r = nir_ilt(bld, r, nir_imm_int(bld, 0));
|
2015-03-31 22:03:39 +01:00
|
|
|
b = nir_ineg(bld, q);
|
|
|
|
q = nir_bcsel(bld, r, b, q);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (op == nir_op_umod) {
|
|
|
|
/* division result in q */
|
|
|
|
r = nir_imul(bld, q, b);
|
|
|
|
q = nir_isub(bld, a, r);
|
|
|
|
}
|
|
|
|
|
|
|
|
assert(alu->dest.dest.is_ssa);
|
2015-09-09 21:24:35 +01:00
|
|
|
nir_ssa_def_rewrite_uses(&alu->dest.dest.ssa, nir_src_for_ssa(q));
|
2016-05-09 17:36:03 +01:00
|
|
|
|
|
|
|
return true;
|
2015-03-31 22:03:39 +01:00
|
|
|
}
|
|
|
|
|
2016-05-09 17:36:03 +01:00
|
|
|
static bool
|
2015-03-31 22:03:39 +01:00
|
|
|
convert_impl(nir_function_impl *impl)
|
|
|
|
{
|
|
|
|
nir_builder b;
|
|
|
|
nir_builder_init(&b, impl);
|
2016-05-09 17:36:03 +01:00
|
|
|
bool progress = false;
|
2015-03-31 22:03:39 +01:00
|
|
|
|
2016-04-08 21:32:58 +01:00
|
|
|
nir_foreach_block(block, impl) {
|
2016-04-27 02:34:19 +01:00
|
|
|
nir_foreach_instr_safe(instr, block) {
|
2016-04-08 21:32:58 +01:00
|
|
|
if (instr->type == nir_instr_type_alu)
|
2016-05-09 17:36:03 +01:00
|
|
|
progress |= convert_instr(&b, nir_instr_as_alu(instr));
|
2016-04-08 21:32:58 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-03-31 22:03:39 +01:00
|
|
|
nir_metadata_preserve(impl, nir_metadata_block_index |
|
|
|
|
nir_metadata_dominance);
|
2016-05-09 17:36:03 +01:00
|
|
|
|
|
|
|
return progress;
|
2015-03-31 22:03:39 +01:00
|
|
|
}
|
|
|
|
|
2016-05-09 17:36:03 +01:00
|
|
|
bool
|
2015-03-31 22:03:39 +01:00
|
|
|
nir_lower_idiv(nir_shader *shader)
|
|
|
|
{
|
2016-05-09 17:36:03 +01:00
|
|
|
bool progress = false;
|
|
|
|
|
2016-04-27 04:26:42 +01:00
|
|
|
nir_foreach_function(function, shader) {
|
2015-12-26 18:00:47 +00:00
|
|
|
if (function->impl)
|
2016-05-09 17:36:03 +01:00
|
|
|
progress |= convert_impl(function->impl);
|
2015-03-31 22:03:39 +01:00
|
|
|
}
|
2016-05-09 17:36:03 +01:00
|
|
|
|
|
|
|
return progress;
|
2015-03-31 22:03:39 +01:00
|
|
|
}
|