209 lines
6.7 KiB
C
209 lines
6.7 KiB
C
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/*
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* Copyright © 2014 Broadcom
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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/**
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* @file
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*
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* Validates the QPU instruction sequence after register allocation and
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* scheduling.
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*/
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#include <assert.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include "v3d_compiler.h"
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#include "qpu/qpu_disasm.h"
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struct v3d_qpu_validate_state {
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struct v3d_compile *c;
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const struct v3d_qpu_instr *last;
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int ip;
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int last_sfu_write;
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};
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static void
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fail_instr(struct v3d_qpu_validate_state *state, const char *msg)
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{
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struct v3d_compile *c = state->c;
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fprintf(stderr, "v3d_qpu_validate at ip %d: %s:\n", state->ip, msg);
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int dump_ip = 0;
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vir_for_each_inst_inorder(inst, c) {
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v3d_qpu_dump(c->devinfo, &inst->qpu);
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if (dump_ip++ == state->ip)
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fprintf(stderr, " *** ERROR ***");
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fprintf(stderr, "\n");
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}
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fprintf(stderr, "\n");
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abort();
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}
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static bool
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qpu_magic_waddr_matches(const struct v3d_qpu_instr *inst,
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bool (*predicate)(enum v3d_qpu_waddr waddr))
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{
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if (inst->type == V3D_QPU_INSTR_TYPE_ALU)
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return false;
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if (inst->alu.add.op != V3D_QPU_A_NOP &&
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inst->alu.add.magic_write &&
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predicate(inst->alu.add.waddr))
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return true;
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if (inst->alu.mul.op != V3D_QPU_M_NOP &&
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inst->alu.mul.magic_write &&
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predicate(inst->alu.mul.waddr))
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return true;
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return false;
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}
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static void
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qpu_validate_inst(struct v3d_qpu_validate_state *state, struct qinst *qinst)
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{
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const struct v3d_qpu_instr *inst = &qinst->qpu;
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if (inst->type != V3D_QPU_INSTR_TYPE_ALU)
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return;
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/* LDVARY writes r5 two instructions later and LDUNIF writes
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* r5 one instruction later, which is illegal to have
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* together.
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*/
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if (state->last && state->last->sig.ldvary && inst->sig.ldunif) {
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fail_instr(state, "LDUNIF after a LDVARY");
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}
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int tmu_writes = 0;
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int sfu_writes = 0;
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int vpm_writes = 0;
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int tlb_writes = 0;
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int tsy_writes = 0;
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if (inst->alu.add.op != V3D_QPU_A_NOP) {
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if (inst->alu.add.magic_write) {
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if (v3d_qpu_magic_waddr_is_tmu(inst->alu.add.waddr))
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tmu_writes++;
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if (v3d_qpu_magic_waddr_is_sfu(inst->alu.add.waddr))
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sfu_writes++;
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if (v3d_qpu_magic_waddr_is_vpm(inst->alu.add.waddr))
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vpm_writes++;
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if (v3d_qpu_magic_waddr_is_tlb(inst->alu.add.waddr))
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tlb_writes++;
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if (v3d_qpu_magic_waddr_is_tsy(inst->alu.add.waddr))
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tsy_writes++;
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}
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}
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if (inst->alu.mul.op != V3D_QPU_M_NOP) {
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if (inst->alu.mul.magic_write) {
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if (v3d_qpu_magic_waddr_is_tmu(inst->alu.mul.waddr))
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tmu_writes++;
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if (v3d_qpu_magic_waddr_is_sfu(inst->alu.mul.waddr))
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sfu_writes++;
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if (v3d_qpu_magic_waddr_is_vpm(inst->alu.mul.waddr))
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vpm_writes++;
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if (v3d_qpu_magic_waddr_is_tlb(inst->alu.mul.waddr))
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tlb_writes++;
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if (v3d_qpu_magic_waddr_is_tsy(inst->alu.mul.waddr))
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tsy_writes++;
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}
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}
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(void)qpu_magic_waddr_matches; /* XXX */
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/* SFU r4 results come back two instructions later. No doing
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* r4 read/writes or other SFU lookups until it's done.
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*/
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if (state->ip - state->last_sfu_write < 2) {
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if (v3d_qpu_uses_mux(inst, V3D_QPU_MUX_R4))
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fail_instr(state, "R4 read too soon after SFU");
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if (v3d_qpu_writes_r4(inst))
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fail_instr(state, "R4 write too soon after SFU");
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if (sfu_writes)
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fail_instr(state, "SFU write too soon after SFU");
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}
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/* XXX: The docs say VPM can happen with the others, but the simulator
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* disagrees.
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*/
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if (tmu_writes +
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sfu_writes +
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vpm_writes +
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tlb_writes +
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tsy_writes +
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inst->sig.ldtmu +
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inst->sig.ldtlb +
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inst->sig.ldvpm +
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inst->sig.ldtlbu > 1) {
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fail_instr(state,
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"Only one of [TMU, SFU, TSY, TLB read, VPM] allowed");
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}
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if (sfu_writes)
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state->last_sfu_write = state->ip;
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}
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static void
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qpu_validate_block(struct v3d_qpu_validate_state *state, struct qblock *block)
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{
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vir_for_each_inst(qinst, block) {
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qpu_validate_inst(state, qinst);
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state->last = &qinst->qpu;
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state->ip++;
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}
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}
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/**
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* Checks for the instruction restrictions from page 37 ("Summary of
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* Instruction Restrictions").
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*/
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void
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qpu_validate(struct v3d_compile *c)
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{
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/* We don't want to do validation in release builds, but we want to
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* keep compiling the validation code to make sure it doesn't get
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* broken.
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*/
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#ifndef DEBUG
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return;
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#endif
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struct v3d_qpu_validate_state state = {
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.c = c,
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.last_sfu_write = -10,
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.ip = 0,
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};
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vir_for_each_block(block, c) {
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qpu_validate_block(&state, block);
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}
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}
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