270 lines
8.8 KiB
C
270 lines
8.8 KiB
C
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/*
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* Copyright © 2020 Valve Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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/*
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* Replaces make availability/visible semantics on barriers with
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* ACCESS_COHERENT on memory loads/stores
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*/
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#include "nir/nir.h"
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#include "shader_enums.h"
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static bool
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get_intrinsic_info(nir_intrinsic_instr *intrin, nir_variable_mode *mode,
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bool *reads, bool *writes)
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{
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switch (intrin->intrinsic) {
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case nir_intrinsic_image_deref_load:
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*mode = nir_src_as_deref(intrin->src[0])->mode;
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*reads = true;
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break;
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case nir_intrinsic_image_deref_store:
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*mode = nir_src_as_deref(intrin->src[0])->mode;
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*writes = true;
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break;
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case nir_intrinsic_image_deref_atomic_add:
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case nir_intrinsic_image_deref_atomic_umin:
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case nir_intrinsic_image_deref_atomic_imin:
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case nir_intrinsic_image_deref_atomic_umax:
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case nir_intrinsic_image_deref_atomic_imax:
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case nir_intrinsic_image_deref_atomic_and:
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case nir_intrinsic_image_deref_atomic_or:
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case nir_intrinsic_image_deref_atomic_xor:
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case nir_intrinsic_image_deref_atomic_exchange:
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case nir_intrinsic_image_deref_atomic_comp_swap:
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*mode = nir_src_as_deref(intrin->src[0])->mode;
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*reads = true;
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*writes = true;
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break;
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case nir_intrinsic_load_ssbo:
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*mode = nir_var_mem_ssbo;
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*reads = true;
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break;
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case nir_intrinsic_store_ssbo:
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*mode = nir_var_mem_ssbo;
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*writes = true;
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break;
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case nir_intrinsic_ssbo_atomic_add:
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case nir_intrinsic_ssbo_atomic_imin:
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case nir_intrinsic_ssbo_atomic_umin:
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case nir_intrinsic_ssbo_atomic_imax:
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case nir_intrinsic_ssbo_atomic_umax:
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case nir_intrinsic_ssbo_atomic_and:
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case nir_intrinsic_ssbo_atomic_or:
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case nir_intrinsic_ssbo_atomic_xor:
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case nir_intrinsic_ssbo_atomic_exchange:
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case nir_intrinsic_ssbo_atomic_comp_swap:
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*mode = nir_var_mem_ssbo;
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*reads = true;
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*writes = true;
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break;
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case nir_intrinsic_load_global:
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*mode = nir_var_mem_global;
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*reads = true;
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break;
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case nir_intrinsic_store_global:
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*mode = nir_var_mem_global;
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*writes = true;
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break;
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case nir_intrinsic_global_atomic_add:
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case nir_intrinsic_global_atomic_imin:
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case nir_intrinsic_global_atomic_umin:
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case nir_intrinsic_global_atomic_imax:
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case nir_intrinsic_global_atomic_umax:
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case nir_intrinsic_global_atomic_and:
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case nir_intrinsic_global_atomic_or:
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case nir_intrinsic_global_atomic_xor:
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case nir_intrinsic_global_atomic_exchange:
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case nir_intrinsic_global_atomic_comp_swap:
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*mode = nir_var_mem_global;
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*reads = true;
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*writes = true;
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break;
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case nir_intrinsic_load_deref:
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*mode = nir_src_as_deref(intrin->src[0])->mode;
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*reads = true;
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break;
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case nir_intrinsic_store_deref:
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*mode = nir_src_as_deref(intrin->src[0])->mode;
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*writes = true;
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break;
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case nir_intrinsic_deref_atomic_add:
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case nir_intrinsic_deref_atomic_imin:
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case nir_intrinsic_deref_atomic_umin:
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case nir_intrinsic_deref_atomic_imax:
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case nir_intrinsic_deref_atomic_umax:
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case nir_intrinsic_deref_atomic_and:
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case nir_intrinsic_deref_atomic_or:
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case nir_intrinsic_deref_atomic_xor:
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case nir_intrinsic_deref_atomic_exchange:
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case nir_intrinsic_deref_atomic_comp_swap:
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*mode = nir_src_as_deref(intrin->src[0])->mode;
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*reads = true;
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*writes = true;
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break;
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default:
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return false;
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}
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return true;
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}
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static bool
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visit_instr(nir_instr *instr, uint32_t *cur_modes, unsigned vis_avail_sem)
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{
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if (instr->type != nir_instr_type_intrinsic)
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return false;
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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if (intrin->intrinsic == nir_intrinsic_scoped_barrier &&
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(nir_intrinsic_memory_semantics(intrin) & vis_avail_sem)) {
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*cur_modes |= nir_intrinsic_memory_modes(intrin);
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unsigned semantics = nir_intrinsic_memory_semantics(intrin);
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nir_intrinsic_set_memory_semantics(
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intrin, semantics & ~vis_avail_sem);
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return true;
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}
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if (!*cur_modes)
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return false; /* early exit */
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nir_variable_mode mode;
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bool reads = false, writes = false;
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if (!get_intrinsic_info(intrin, &mode, &reads, &writes))
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return false;
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if (!reads && vis_avail_sem == NIR_MEMORY_MAKE_VISIBLE)
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return false;
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if (!writes && vis_avail_sem == NIR_MEMORY_MAKE_AVAILABLE)
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return false;
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unsigned access = nir_intrinsic_access(intrin);
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if (access & (ACCESS_NON_READABLE | ACCESS_NON_WRITEABLE | ACCESS_CAN_REORDER | ACCESS_COHERENT))
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return false;
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if (*cur_modes & mode) {
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nir_intrinsic_set_access(intrin, access | ACCESS_COHERENT);
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return true;
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}
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return false;
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}
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static bool
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lower_make_visible(nir_cf_node *cf_node, uint32_t *cur_modes)
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{
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bool progress = false;
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switch (cf_node->type) {
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case nir_cf_node_block: {
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nir_block *block = nir_cf_node_as_block(cf_node);
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nir_foreach_instr(instr, block)
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visit_instr(instr, cur_modes, NIR_MEMORY_MAKE_VISIBLE);
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break;
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}
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case nir_cf_node_if: {
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nir_if *nif = nir_cf_node_as_if(cf_node);
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uint32_t cur_modes_then = *cur_modes;
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uint32_t cur_modes_else = *cur_modes;
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foreach_list_typed(nir_cf_node, if_node, node, &nif->then_list)
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progress |= lower_make_visible(if_node, &cur_modes_then);
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foreach_list_typed(nir_cf_node, if_node, node, &nif->else_list)
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progress |= lower_make_visible(if_node, &cur_modes_else);
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*cur_modes |= cur_modes_then | cur_modes_else;
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break;
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}
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case nir_cf_node_loop: {
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nir_loop *loop = nir_cf_node_as_loop(cf_node);
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bool loop_progress;
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do {
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loop_progress = false;
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foreach_list_typed(nir_cf_node, loop_node, node, &loop->body)
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loop_progress |= lower_make_visible(loop_node, cur_modes);
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progress |= loop_progress;
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} while (loop_progress);
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break;
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}
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case nir_cf_node_function:
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unreachable("Invalid cf type");
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}
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return progress;
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}
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static bool
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lower_make_available(nir_cf_node *cf_node, uint32_t *cur_modes)
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{
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bool progress = false;
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switch (cf_node->type) {
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case nir_cf_node_block: {
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nir_block *block = nir_cf_node_as_block(cf_node);
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nir_foreach_instr_reverse(instr, block)
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visit_instr(instr, cur_modes, NIR_MEMORY_MAKE_AVAILABLE);
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break;
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}
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case nir_cf_node_if: {
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nir_if *nif = nir_cf_node_as_if(cf_node);
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uint32_t cur_modes_then = *cur_modes;
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uint32_t cur_modes_else = *cur_modes;
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foreach_list_typed_reverse(nir_cf_node, if_node, node, &nif->then_list)
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progress |= lower_make_available(if_node, &cur_modes_then);
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foreach_list_typed_reverse(nir_cf_node, if_node, node, &nif->else_list)
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progress |= lower_make_available(if_node, &cur_modes_else);
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*cur_modes |= cur_modes_then | cur_modes_else;
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break;
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}
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case nir_cf_node_loop: {
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nir_loop *loop = nir_cf_node_as_loop(cf_node);
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bool loop_progress;
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do {
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loop_progress = false;
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foreach_list_typed_reverse(nir_cf_node, loop_node, node, &loop->body)
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loop_progress |= lower_make_available(loop_node, cur_modes);
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progress |= loop_progress;
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} while (loop_progress);
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break;
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}
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case nir_cf_node_function:
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unreachable("Invalid cf type");
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}
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return progress;
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}
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bool
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nir_lower_memory_model(nir_shader *shader)
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{
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bool progress = false;
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struct exec_list *cf_list = &nir_shader_get_entrypoint(shader)->body;
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uint32_t modes = 0;
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foreach_list_typed(nir_cf_node, cf_node, node, cf_list)
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progress |= lower_make_visible(cf_node, &modes);
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modes = 0;
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foreach_list_typed_reverse(nir_cf_node, cf_node, node, cf_list)
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progress |= lower_make_available(cf_node, &modes);
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return progress;
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}
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